mintsuki 57496ad0c7 stivale2: Implement MTRR Write Combining Framebuffer tag		2021-01-03 02:43:27 +01:00
..
a20.c	Move A20 handler out of bootsector and into stage 2	2020-10-15 11:35:49 +02:00
a20.h	Move A20 handler out of bootsector and into stage 2	2020-10-15 11:35:49 +02:00
cpu.h	Change return type of cpuid(), add APIC existance check, do not assume BSP APIC ID to be 0	2020-10-22 15:25:10 +02:00
e820.c	Remove instances in which conv_mem_alloc() was implicitly used as a realloc() as that subtly introduces bugs	2020-10-20 08:51:56 +02:00
e820.h	Reorganise headers	2020-09-21 12:15:55 +02:00
gdt.asm	gpt: Embed stage2 code within GPT structures so an extra partition is not needed	2020-12-06 16:43:38 +01:00
lapic.c	LAPIC: Fix bug where wrong CPUID bit was tested to check for APIC	2020-10-26 17:36:35 +01:00
lapic.h	Change return type of cpuid(), add APIC existance check, do not assume BSP APIC ID to be 0	2020-10-22 15:25:10 +02:00
pic.c	Fix up some inline assembly in sys/cpu.h	2020-10-01 20:05:41 +02:00
pic.h	Reorganise headers	2020-09-21 12:15:55 +02:00
smp_trampoline.asm	stivale2: Implement MTRR Write Combining Framebuffer tag	2021-01-03 02:43:27 +01:00
smp.c	Set the 'level' flag when sending Init and Startup IPIs	2020-12-28 13:44:52 +01:00
smp.h	SMP: Fix struct duplication bug	2020-10-25 12:41:13 +01:00