rulimine/common/sys
2023-08-10 12:27:27 -05:00
..
a20.h
a20.s2.c misc: Rename UEFI and BIOS define macros 2022-09-02 02:29:12 +02:00
cpu.c
cpu.h Initial riscv64 port (#274) 2023-06-04 01:36:06 +02:00
dummy_isr.asm_ia32 asm: Add missing section directives 2023-06-20 13:24:49 +02:00
dummy_isr.asm_x86_64 asm: Add missing section directives 2023-06-20 13:24:49 +02:00
e820.h
e820.s2.c misc: Rename UEFI and BIOS define macros 2022-09-02 02:29:12 +02:00
exceptions.s2.c misc: Rename UEFI and BIOS define macros 2022-09-02 02:29:12 +02:00
gdt.h
gdt.s2.c misc: Rename UEFI and BIOS define macros 2022-09-02 02:29:12 +02:00
idt.c misc: blib.h -> misc.h 2022-08-26 23:44:47 +02:00
idt.h misc: Rename UEFI and BIOS define macros 2022-09-02 02:29:12 +02:00
idt.s2.c misc: Rename UEFI and BIOS define macros 2022-09-02 02:29:12 +02:00
int_thunks.s2.asm_bios_ia32
lapic.c misc: blib.h -> misc.h 2022-08-26 23:44:47 +02:00
lapic.h
pic.c misc: blib.h -> misc.h 2022-08-26 23:44:47 +02:00
pic.h
sbi.asm_riscv64 rv64: Misc relaxation related fixes 2023-08-01 05:06:40 -05:00
sbi.h Initial riscv64 port (#274) 2023-06-04 01:36:06 +02:00
smp_trampoline.asm_aarch64 limine: Remove dependency on identity map in AArch64 code 2023-07-26 23:13:33 +02:00
smp_trampoline.asm_riscv64 smp/riscv: don't report completion to BSP before actually completed 2023-08-10 12:27:27 -05:00
smp_trampoline.asm_x86
smp.c limine/riscv: remove dependency on lower half identity map 2023-08-02 15:20:47 -05:00
smp.h limine/riscv: remove dependency on lower half identity map 2023-08-02 15:20:47 -05:00