98 lines
1.4 KiB
Plaintext
98 lines
1.4 KiB
Plaintext
bits 32
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section .text
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global limine_spinup_32
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limine_spinup_32:
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; Enable EFER.NXE
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mov ecx, 0xc0000080
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rdmsr
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bts eax, 11
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wrmsr
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; Enable CR4.LA57
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cmp dword [esp+4], 0 ; level5pg
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je .no_la57
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mov eax, cr4
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bts eax, 12
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mov cr4, eax
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.no_la57:
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; Enable CR0.WP
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mov eax, cr0
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bts eax, 16
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mov cr0, eax
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cld
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mov eax, [esp+8] ; pagemap_top_lv
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mov cr3, eax
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; Enable CR4.PAE
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mov eax, cr4
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bts eax, 5
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mov cr4, eax
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; Enable EFER.LME
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mov eax, 0xc0000080
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rdmsr
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bts eax, 8
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wrmsr
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; Enable CR0.PG
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mov eax, cr0
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bts eax, 31
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mov cr0, eax
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; Go 64
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push 0x28
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call .p1
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.p1:
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add dword [esp], .mode64 - .p1
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retfd
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bits 64
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.mode64:
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mov eax, 0x30
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mov ds, eax
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mov es, eax
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mov fs, eax
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mov gs, eax
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mov ss, eax
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; Load 64-bit GDT
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mov eax, [rsp+28] ; local_gdt
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lgdt [rax]
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; Push fake return address
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mov rsi, [rsp+20] ; stack
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sub rsi, 8
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mov qword [rsi], 0
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; Prepare iretq frame
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mov rax, qword [rsp+12] ; entry_point
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push 0x30
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push rsi
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pushfq
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push 0x28
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push rax
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; Zero out all GPRs
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xor eax, eax
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xor ebx, ebx
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xor ecx, ecx
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xor edx, edx
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xor esi, esi
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xor edi, edi
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xor ebp, ebp
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xor r8d, r8d
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xor r9d, r9d
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xor r10d, r10d
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xor r11d, r11d
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xor r12d, r12d
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xor r13d, r13d
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xor r14d, r14d
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xor r15d, r15d
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iretq
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