174 lines
3.8 KiB
C
174 lines
3.8 KiB
C
#ifndef __SYS__CPU_H__
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#define __SYS__CPU_H__
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#include <stdint.h>
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#define FLAT_PTR(PTR) (*((int(*)[])(PTR)))
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#define BYTE_PTR(PTR) (*((uint8_t *)(PTR)))
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#define WORD_PTR(PTR) (*((uint16_t *)(PTR)))
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#define DWORD_PTR(PTR) (*((uint32_t *)(PTR)))
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#define QWORD_PTR(PTR) (*((uint64_t *)(PTR)))
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static inline void port_out_b(uint16_t port, uint8_t value) {
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asm volatile ("out dx, al" : : "a" (value), "d" (port) : "memory");
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}
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static inline void port_out_w(uint16_t port, uint16_t value) {
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asm volatile ("out dx, ax" : : "a" (value), "d" (port) : "memory");
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}
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static inline void port_out_d(uint16_t port, uint32_t value) {
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asm volatile ("out dx, eax" : : "a" (value), "d" (port) : "memory");
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}
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static inline uint8_t port_in_b(uint16_t port) {
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uint8_t value;
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asm volatile ("in al, dx" : "=a" (value) : "d" (port) : "memory");
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return value;
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}
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static inline uint16_t port_in_w(uint16_t port) {
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uint16_t value;
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asm volatile ("in ax, dx" : "=a" (value) : "d" (port) : "memory");
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return value;
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}
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static inline uint32_t port_in_d(uint16_t port) {
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uint32_t value;
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asm volatile ("in eax, dx" : "=a" (value) : "d" (port) : "memory");
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return value;
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}
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static inline void mmoutb(void *addr, uint8_t value) {
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asm volatile (
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"mov %0, %1\n\t"
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: "=m"(BYTE_PTR(addr))
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: "r"(value)
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: "memory"
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);
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}
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static inline void mmoutw(void *addr, uint16_t value) {
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asm volatile (
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"mov %0, %1\n\t"
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: "=m"(WORD_PTR(addr))
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: "r"(value)
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: "memory"
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);
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}
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static inline void mmoutd(void *addr, uint32_t value) {
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asm volatile (
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"mov %0, %1\n\t"
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: "=m"(DWORD_PTR(addr))
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: "r"(value)
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: "memory"
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);
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}
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static inline void mmoutq(void *addr, uint64_t value) {
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asm volatile (
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"mov %0, %1\n\t"
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: "=m"(QWORD_PTR(addr))
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: "r"(value)
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: "memory"
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);
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}
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static inline uint8_t mminb(void *addr) {
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uint8_t ret;
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asm volatile (
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"mov %0, %1\n\t"
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: "=r"(ret)
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: "m"(BYTE_PTR(addr))
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: "memory"
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);
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return ret;
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}
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static inline uint16_t mminw(void *addr) {
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uint16_t ret;
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asm volatile (
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"mov %0, %1\n\t"
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: "=r"(ret)
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: "m"(WORD_PTR(addr))
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: "memory"
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);
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return ret;
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}
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static inline uint32_t mmind(void *addr) {
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uint32_t ret;
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asm volatile (
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"mov %0, %1\n\t"
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: "=r"(ret)
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: "m"(DWORD_PTR(addr))
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: "memory"
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);
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return ret;
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}
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static inline uint64_t mminq(void *addr) {
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uint64_t ret;
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asm volatile (
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"mov %0, %1\n\t"
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: "=r"(ret)
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: "m"(QWORD_PTR(addr))
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: "memory"
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);
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return ret;
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}
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static inline uint64_t rdmsr(uint32_t msr) {
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uint32_t edx, eax;
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asm volatile ("rdmsr"
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: "=a" (eax), "=d" (edx)
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: "c" (msr)
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: "memory");
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return ((uint64_t)edx << 32) | eax;
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}
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static inline void wrmsr(uint32_t msr, uint64_t value) {
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uint32_t edx = value >> 32;
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uint32_t eax = (uint32_t)value;
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asm volatile ("wrmsr"
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:
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: "a" (eax), "d" (edx), "c" (msr)
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: "memory");
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}
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#define write_cr(reg, val) ({ \
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asm volatile ("mov cr" reg ", %0" : : "r" (val)); \
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})
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#define read_cr(reg) ({ \
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size_t cr; \
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asm volatile ("mov %0, cr" reg : "=r" (cr)); \
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cr; \
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})
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#define locked_read(var) ({ \
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typeof(*var) ret = 0; \
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asm volatile ( \
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"lock xadd %1, %0;" \
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: "+r" (ret) \
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: "m" (*(var)) \
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: "memory", "cc" \
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); \
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ret; \
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})
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#define locked_write(var, val) ({ \
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typeof(*var) ret = val; \
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asm volatile ( \
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"lock xchg %1, %0;" \
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: "+r" ((ret)) \
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: "m" (*(var)) \
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: "memory" \
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); \
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ret; \
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})
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#endif
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