e1f6ac8860
* Initial aarch64 port * Enable chainload on aarch64 No changes necessary since it's all UEFI anyway. * Add specification for Limine protocol for aarch64 * PROTOCOL: Specify state of information in DT /chosen node * common: Add spinup code for aarch64 * common: Port elf and term to aarch64 * common: Port vmm to aarch64 Also prepare to drop VMM_FLAG_PRESENT on x86. * protos: Port limine boot protocol to aarch64 Also drop VMM_FLAG_PRESENT since we never unmap pages anyway. * test: Add DTB request * PROTOCOL: Port SMP request to aarch64 * cpu: Add cache maintenance functions for aarch64 * protos/limine, sys: Port SMP to aarch64 Also move common asm macros into a header file. * test: Start up APs * vmm: Unify get_next_level and implement large page splitting * protos/limine: Map framebuffer using correct caching mode on AArch64 * CI: Fix GCC build for aarch64 * entry, menu: Replace uses of naked attribute with separate asm file GCC does not understand the naked attribute on aarch64, and didn't understand it for x86 in older versions.
29 lines
1.1 KiB
C
29 lines
1.1 KiB
C
#include <sys/cpu.h>
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extern bool cpuid(uint32_t leaf, uint32_t subleaf,
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uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx);
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extern void outb(uint16_t port, uint8_t value);
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extern void outw(uint16_t port, uint16_t value);
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extern void outd(uint16_t port, uint32_t value);
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extern uint8_t inb(uint16_t port);
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extern uint16_t inw(uint16_t port);
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extern uint32_t ind(uint16_t port);
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extern void mmoutb(uintptr_t addr, uint8_t value);
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extern void mmoutw(uintptr_t addr, uint16_t value);
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extern void mmoutd(uintptr_t addr, uint32_t value);
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extern void mmoutq(uintptr_t addr, uint64_t value);
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extern uint8_t mminb(uintptr_t addr);
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extern uint16_t mminw(uintptr_t addr);
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extern uint32_t mmind(uintptr_t addr);
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extern uint64_t mminq(uintptr_t addr);
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extern uint64_t rdmsr(uint32_t msr);
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extern void wrmsr(uint32_t msr, uint64_t value);
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extern uint64_t rdtsc(void);
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extern void delay(uint64_t cycles);
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extern size_t icache_line_size(void);
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extern size_t dcache_line_size(void);
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extern void clean_inval_dcache_poc(uintptr_t start, uintptr_t end);
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extern void inval_icache_pou(uintptr_t start, uintptr_t end);
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extern int current_el(void);
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