ethan
806766aa90
protocol code clean up
2020-09-30 17:08:08 -06:00
mintsuki
86a69d8724
Add write-combining and MTRR support to speed up VBE framebuffer
2020-09-27 17:39:30 +02:00
mintsuki
11240b59a5
Fix potential memmap circular dependency issue
2020-09-26 15:06:59 +02:00
mintsuki
b41fa7e204
Fix bugs related to handling real mode switch in inline assembly sections; reenable LTO as that fixes it
2020-09-25 22:57:57 +02:00
mintsuki
f245d0e280
Reorganise headers
2020-09-21 12:15:55 +02:00
mintsuki
e721c3c814
Reorganise pmm code
2020-09-20 12:03:44 +02:00
mintsuki
c2bf4835ef
Add sys/ directory to stage2
2020-09-18 20:02:10 +02:00
mintsuki
41c68e5e43
Initial SMP implementation
2020-09-18 14:39:29 +02:00
VAN BOSSUYT Nicolas
9f0a2c6013
Move stivale in separate headers.
...
Making them easier to use when including "limine" has a submodule.
Also renamed stivale2_hdr_tag_framebuffer to stivale2_header_tag_framebuffer.
This make it more consistant with other declaration in stivale2.
2020-09-18 12:51:26 +02:00
mintsuki
3c790f988b
Clarify the stack situation in stivale specs
2020-09-18 10:57:38 +02:00
マーモット
8271c0b8df
32bit stivale was not pushing a return address. ( #26 )
...
When trying to boot skift using limine I was still getting an invalid address for the stivale struct.
Pushing an additional 0 where the return address should have been fixed the issue.
2020-09-18 10:16:24 +02:00
mintsuki
79fb7342ce
Fix bug in 32-bit stivale
2020-09-17 23:22:53 +02:00
mintsuki
a909fd821c
Some work on ACPI and use EBDA start as end of usable conventional memory
2020-09-17 12:06:35 +02:00
mintsuki
1bb1bd2201
Revert to -masm=intel for inline assembly
2020-09-16 17:22:05 +02:00
mintsuki
cb9edd2a7b
Reorganise source tree
2020-09-14 19:32:11 +02:00
