4 Commits

Author	SHA1	Message	Date
mintsuki	fed6645044	MTRR: Add cpuid mtrr feature check	2020-09-28 01:30:12 +02:00
mintsuki	f49fad138c	MTRR: Fix bug where 2 ANDs should have been ORs	2020-09-27 19:17:36 +02:00
mintsuki	98c5b88f5e	MTRR: Ensure size of MTRR range is aligned to the closest power of 2	2020-09-27 19:14:09 +02:00
mintsuki	86a69d8724	Add write-combining and MTRR support to speed up VBE framebuffer	2020-09-27 17:39:30 +02:00