Move A20 handler out of bootsector and into stage 2
This commit is contained in:
mintsuki
parent
1d7cc0eeca
commit
de0f0da1c6
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@ -1,126 +0,0 @@
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a20_check:
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; *************************************************
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; Checks if the A20 address line is enabled
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; *************************************************
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; OUT:
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; Carry if disabled, cleared if enabled
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push ax ; Save registers
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push bx
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push es
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push fs
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xor ax, ax ; Set ES segment to zero
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mov es, ax
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not ax ; Set FS segment to 0xFFFF
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mov fs, ax
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mov ax, word [es:0x7DFE] ; Check using boot signature
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cmp word [fs:0x7E0E], ax ; If A20 is disabled, this should be the
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; same address as the boot signature
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je .change_values ; If they are equal, check again with another value
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.enabled:
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clc ; A20 is enabled, clear carry flag
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jmp .done
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.change_values:
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mov word [es:0x7DFE], 0x1234 ; Change the value of 0000:7DFE to 0x1234
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cmp word [fs:0x7E0E], 0x1234 ; Is FFFF:7E0E changed as well?
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jne .enabled ; If it is, A20 is enabled
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stc ; Otherwise set carry
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.done:
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mov word [es:0x7DFE], ax ; Restore boot signature
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pop fs ; Restore registers
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pop es
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pop bx
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pop ax
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ret ; Exit routine
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enable_a20:
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; ********************************************
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; Tries to enable the A20 address line
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; ********************************************
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; OUT:
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; Carry cleared if success, set if fail
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push eax ; Save registers
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call a20_check ; Check if a20 is already enabled
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jnc .done ; If it is, we are done
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mov ax, 0x2401 ; Use BIOS to try to enable a20
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int 0x15
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call a20_check ; Check again to see if BIOS succeeded
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jnc .done ; If it has, we are done
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.keyboard_method:
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cli ; Disable interrupts
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call .a20wait ; Use the keyboard controller to try and
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mov al, 0xAD ; open the A20 gate
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out 0x64, al
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call .a20wait
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mov al, 0xD0
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out 0x64, al
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call .a20wait2
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in al, 0x60
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push eax
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call .a20wait
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mov al, 0xD1
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out 0x64, al
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call .a20wait
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pop eax
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or al, 2
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out 0x60, al
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call .a20wait
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mov al, 0xAE
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out 0x64, al
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call .a20wait
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sti ; Enable interrupts back
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jmp .keyboard_done
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.a20wait:
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in al, 0x64
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test al, 2
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jnz .a20wait
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ret
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.a20wait2:
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in al, 0x64
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test al, 1
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jz .a20wait2
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ret
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.keyboard_done:
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call a20_check ; Check for success
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; Now just quit the routine, forwarding the carry flag to the caller
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.done:
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pop eax
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ret
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@ -41,96 +41,38 @@ start:
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mov dl, 0x80
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.continue:
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mov si, LoadingMsg
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call simple_print
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; ****************** Load stage 1.5 ******************
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; Make sure int 13h extensions are supported
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mov ah, 0x41
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mov bx, 0x55aa
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int 0x13
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jc err_reading_disk
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jc err
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cmp bx, 0xaa55
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jne err_reading_disk
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jne err
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; If int 13h extensions are supported, then we are definitely running on
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; a 386+. We have no idea whether the upper 16 bits of esp are cleared, so
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; make sure that is the case now.
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mov esp, 0x7c00
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mov eax, dword [stage15_sector]
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mov bx, 0x7e00
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mov cx, 1
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call read_sectors
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jc err_reading_disk
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jmp 0x7e00
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err_reading_disk:
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mov si, ErrReadDiskMsg
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call simple_print
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jmp halt
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err_enabling_a20:
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mov si, ErrEnableA20Msg
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call simple_print
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jmp halt
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halt:
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hlt
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jmp halt
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; Data
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LoadingMsg db 0x0D, 0x0A, 'Limine', 0x0D, 0x0A, 0x0A, 0x00
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ErrReadDiskMsg db 0x0D, 0x0A, 'Disk err', 0x00
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ErrEnableA20Msg db 0x0D, 0x0A, 'A20 err', 0x00
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times 0xda-($-$$) db 0
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times 6 db 0
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; Includes
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%include 'simple_print.inc'
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%include 'disk.inc'
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times 0x1b0-($-$$) db 0
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stage15_sector: dd 1
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times 0x1b8-($-$$) db 0
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times 510-($-$$) db 0
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dw 0xaa55
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; ********************* Stage 1.5 *********************
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stage15:
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push es
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push 0x7000
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pop es
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mov eax, dword [stage15_sector]
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inc eax
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mov eax, dword [stage2_sector]
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xor bx, bx
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mov cx, 62
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mov cx, 63
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call read_sectors
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pop es
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jc err_reading_disk
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call enable_a20
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jc err_enabling_a20
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jc err
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call load_gdt
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cli
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mov eax, cr0
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or al, 1
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bts ax, 0
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mov cr0, eax
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jmp 0x18:.pmode
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jmp 0x18:.mode32
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bits 32
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.pmode:
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.mode32:
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mov ax, 0x20
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mov ds, ax
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mov es, ax
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@ -142,16 +84,34 @@ stage15:
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push edx
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push stage2.size
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push (stage2 - 0x8000) + 0x70000
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push (stage2 - decompressor) + 0x70000
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call 0x70000
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bits 16
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%include 'a20_enabler.inc'
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err:
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hlt
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jmp err
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times 0xda-($-$$) db 0
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times 6 db 0
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; Includes
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%include 'disk.inc'
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%include 'gdt.inc'
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times 1024-($-$$) db 0
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times 0x1b0-($-$$) db 0
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stage2_sector: dd 1
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times 0x1b8-($-$$) db 0
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times 510-($-$$) db 0
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dw 0xaa55
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; ********************* Stage 2 *********************
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decompressor:
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incbin '../decompressor/decompressor.bin'
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align 16
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@ -1,22 +0,0 @@
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; **************************************
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; Prints a string using the BIOS
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; **************************************
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; IN:
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; SI = points to a 0x00 terminated string
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simple_print:
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push ax
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push si
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; int 0x10, function 0x0e (print character)
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mov ah, 0x0e
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.loop:
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lodsb
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test al, al
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jz .done
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int 0x10
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jmp .loop
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.done:
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pop si
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pop ax
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ret
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BIN
limine.bin
BIN
limine.bin
Binary file not shown.
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@ -6,6 +6,7 @@
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#include <lib/part.h>
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#include <lib/config.h>
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#include <sys/e820.h>
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#include <sys/a20.h>
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#include <lib/print.h>
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#include <fs/file.h>
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#include <lib/elf.h>
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@ -24,6 +25,9 @@ void entry(int boot_drive) {
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print("Limine " LIMINE_VERSION "\n\n");
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if (!a20_enable())
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panic("Could not enable A20 line");
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print("Boot drive: %x\n", boot_drive);
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// Look for config file.
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@ -0,0 +1,54 @@
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#include <stdint.h>
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#include <stddef.h>
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#include <stdbool.h>
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#include <sys/a20.h>
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#include <sys/cpu.h>
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#include <lib/real.h>
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bool a20_check(void) {
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if (mminw(0x7dfe) != mminw(0x7dfe + 0x100000))
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return true;
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mmoutw(0x7dfe, ~mminw(0x7dfe));
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if (mminw(0x7dfe) != mminw(0x7dfe + 0x100000))
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return true;
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return false;
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}
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// Keyboard controller method code below taken from:
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// https://wiki.osdev.org/A20_Line
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bool a20_enable(void) {
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if (a20_check())
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return true;
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// BIOS method
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struct rm_regs r = {0};
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r.eax = 0x2401;
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rm_int(0x15, &r, &r);
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if (a20_check())
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return true;
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// Keyboard controller method
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while (inb(0x64) & 2);
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outb(0x64, 0xad);
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while (inb(0x64) & 2);
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outb(0x64, 0xd0);
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while (!(inb(0x64) & 1));
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uint8_t b = inb(0x60);
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while (inb(0x64) & 2);
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outb(0x64, 0xd1);
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while (inb(0x64) & 2);
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outb(0x60, b | 2);
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while (inb(0x64) & 2);
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outb(0x64, 0xae);
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while (inb(0x64) & 2);
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if (a20_check())
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return true;
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return false;
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}
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@ -0,0 +1,9 @@
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#ifndef __SYS__A20_H__
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#define __SYS__A20_H__
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#include <stdbool.h>
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bool a20_check(void);
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bool a20_enable(void);
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#endif
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@ -55,81 +55,81 @@ static inline uint32_t ind(uint16_t port) {
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return value;
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}
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static inline void mmoutb(void *addr, uint8_t value) {
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static inline void mmoutb(uintptr_t addr, uint8_t value) {
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asm volatile (
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"mov %0, %1"
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: "=m" (BYTE_PTR(addr))
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: "g" (value)
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: "ir" (value)
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: "memory"
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);
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}
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static inline void mmoutw(void *addr, uint16_t value) {
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static inline void mmoutw(uintptr_t addr, uint16_t value) {
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asm volatile (
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"mov %0, %1"
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: "=m" (WORD_PTR(addr))
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: "g" (value)
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: "ir" (value)
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: "memory"
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);
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}
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static inline void mmoutd(void *addr, uint32_t value) {
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static inline void mmoutd(uintptr_t addr, uint32_t value) {
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asm volatile (
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"mov %0, %1"
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: "=m" (DWORD_PTR(addr))
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: "g" (value)
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: "ir" (value)
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: "memory"
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);
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}
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static inline void mmoutq(void *addr, uint64_t value) {
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static inline void mmoutq(uintptr_t addr, uint64_t value) {
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asm volatile (
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"mov %0, %1"
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: "=m" (QWORD_PTR(addr))
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: "g" (value)
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: "ir" (value)
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: "memory"
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);
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}
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static inline uint8_t mminb(void *addr) {
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static inline uint8_t mminb(uintptr_t addr) {
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uint8_t ret;
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asm volatile (
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"mov %0, %1"
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: "=r" (ret)
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: "g" (BYTE_PTR(addr))
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: "m" (BYTE_PTR(addr))
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: "memory"
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);
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return ret;
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}
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static inline uint16_t mminw(void *addr) {
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static inline uint16_t mminw(uintptr_t addr) {
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uint16_t ret;
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asm volatile (
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"mov %0, %1"
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: "=r" (ret)
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: "g" (WORD_PTR(addr))
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: "m" (WORD_PTR(addr))
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: "memory"
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);
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return ret;
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}
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static inline uint32_t mmind(void *addr) {
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static inline uint32_t mmind(uintptr_t addr) {
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uint32_t ret;
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asm volatile (
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"mov %0, %1"
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: "=r" (ret)
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: "g" (DWORD_PTR(addr))
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: "m" (DWORD_PTR(addr))
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: "memory"
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);
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return ret;
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}
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static inline uint64_t mminq(void *addr) {
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static inline uint64_t mminq(uintptr_t addr) {
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uint64_t ret;
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asm volatile (
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"mov %0, %1"
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: "=r" (ret)
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: "g" (QWORD_PTR(addr))
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: "m" (QWORD_PTR(addr))
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: "memory"
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);
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return ret;
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@ -16,12 +16,12 @@ struct dmar {
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uint32_t lapic_read(uint32_t reg) {
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size_t lapic_mmio_base = (size_t)(rdmsr(0x1b) & 0xfffff000);
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return mmind((void *)(lapic_mmio_base + reg));
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return mmind(lapic_mmio_base + reg);
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}
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void lapic_write(uint32_t reg, uint32_t data) {
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size_t lapic_mmio_base = (size_t)(rdmsr(0x1b) & 0xfffff000);
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mmoutd((void *)(lapic_mmio_base + reg), data);
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mmoutd(lapic_mmio_base + reg, data);
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}
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bool x2apic_check(void) {
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