misc: Fixes for GCC 12 warnings; add extern prototypes for inline functions
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.github/workflows/check.yml
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2
.github/workflows/check.yml
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@ -15,4 +15,4 @@ jobs:
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run: sudo apt-get update && sudo apt-get install git build-essential autoconf automake nasm curl mtools -y
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- name: Build the bootloader
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run: ./autogen.sh && make all
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run: ./autogen.sh --enable-werror && make all
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@ -37,9 +37,9 @@ test "x$LIMINE_OBJDUMP" = "x" && LIMINE_OBJDUMP='$(TOOLCHAIN)-objdump'
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AC_ARG_VAR(LIMINE_READELF, [Readelf command for Limine [$(TOOLCHAIN)-readelf]])
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test "x$LIMINE_READELF" = "x" && LIMINE_READELF='$(TOOLCHAIN)-readelf'
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werror_state="yes"
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werror_state="no"
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AC_ARG_ENABLE([werror],
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AS_HELP_STRING([--disable-werror], [do not treat warnings as errors]),
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AS_HELP_STRING([--enable-werror], [treat warnings as errors]),
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werror_state="$enableval")
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if test "$werror_state" = "yes"; then
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@ -4,7 +4,7 @@
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#include <stdint.h>
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#include <stddef.h>
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#define EBDA ((size_t)(*((uint16_t *)0x40e)) * 16)
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#define EBDA ((size_t)(*((volatile uint16_t *)0x40e)) * 16)
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struct sdt {
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char signature[4];
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@ -53,7 +53,7 @@ struct smbios_entry_point_32 {
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char formatted_area[5];
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char intermediate_anchor_str[5];
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/// Checksum for values from intermediate anchor str to the
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/// Checksum for values from intermediate anchor str to the
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/// end of table.
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uint8_t intermediate_checksum;
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/// Total length of SMBIOS Structure Table, pointed to by the structure
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@ -10,6 +10,8 @@
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#include <lib/print.h>
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#include <mm/pmm.h>
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extern void reset_term(void);
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bool early_term = false;
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void term_deinit(void) {
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@ -19,7 +19,6 @@
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#if bios == 1
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__attribute__((noinline))
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__attribute__((section(".realmode")))
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static void spinup(uint8_t drive) {
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struct idtr real_mode_idt;
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22
stage23/sys/cpu.c
Normal file
22
stage23/sys/cpu.c
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@ -0,0 +1,22 @@
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#include <sys/cpu.h>
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extern bool cpuid(uint32_t leaf, uint32_t subleaf,
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uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx);
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extern void outb(uint16_t port, uint8_t value);
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extern void outw(uint16_t port, uint16_t value);
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extern void outd(uint16_t port, uint32_t value);
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extern uint8_t inb(uint16_t port);
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extern uint16_t inw(uint16_t port);
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extern uint32_t ind(uint16_t port);
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extern void mmoutb(uintptr_t addr, uint8_t value);
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extern void mmoutw(uintptr_t addr, uint16_t value);
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extern void mmoutd(uintptr_t addr, uint32_t value);
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extern void mmoutq(uintptr_t addr, uint64_t value);
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extern uint8_t mminb(uintptr_t addr);
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extern uint16_t mminw(uintptr_t addr);
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extern uint32_t mmind(uintptr_t addr);
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extern uint64_t mminq(uintptr_t addr);
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extern uint64_t rdmsr(uint32_t msr);
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extern void wrmsr(uint32_t msr, uint64_t value);
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extern uint64_t rdtsc(void);
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extern void delay(uint64_t cycles);
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@ -4,13 +4,6 @@
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#include <stdint.h>
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#include <stdbool.h>
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#define FLAT_PTR(PTR) (*((int(*)[])(PTR)))
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#define BYTE_PTR(PTR) (*((uint8_t *)(PTR)))
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#define WORD_PTR(PTR) (*((uint16_t *)(PTR)))
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#define DWORD_PTR(PTR) (*((uint32_t *)(PTR)))
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#define QWORD_PTR(PTR) (*((uint64_t *)(PTR)))
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inline bool cpuid(uint32_t leaf, uint32_t subleaf,
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uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) {
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uint32_t cpuid_max;
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@ -58,46 +51,48 @@ inline uint32_t ind(uint16_t port) {
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inline void mmoutb(uintptr_t addr, uint8_t value) {
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asm volatile (
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"movb %1, %0"
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: "=m" (BYTE_PTR(addr))
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: "ir" (value)
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"movb %1, (%0)"
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:
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: "r" (addr), "ir" (value)
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: "memory"
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);
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}
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inline void mmoutw(uintptr_t addr, uint16_t value) {
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asm volatile (
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"movw %1, %0"
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: "=m" (WORD_PTR(addr))
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: "ir" (value)
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"movw %1, (%0)"
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:
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: "r" (addr), "ir" (value)
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: "memory"
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);
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}
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inline void mmoutd(uintptr_t addr, uint32_t value) {
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asm volatile (
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"movl %1, %0"
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: "=m" (DWORD_PTR(addr))
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: "ir" (value)
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"movl %1, (%0)"
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:
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: "r" (addr), "ir" (value)
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: "memory"
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);
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}
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#if defined (__x86_64__)
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inline void mmoutq(uintptr_t addr, uint64_t value) {
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asm volatile (
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"movq %1, %0"
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: "=m" (QWORD_PTR(addr))
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: "ir" (value)
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"movq %1, (%0)"
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:
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: "r" (addr), "r" (value)
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: "memory"
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);
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}
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#endif
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inline uint8_t mminb(uintptr_t addr) {
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uint8_t ret;
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asm volatile (
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"movb %1, %0"
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"movb (%1), %0"
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: "=r" (ret)
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: "m" (BYTE_PTR(addr))
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: "r" (addr)
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: "memory"
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);
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return ret;
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@ -106,9 +101,9 @@ inline uint8_t mminb(uintptr_t addr) {
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inline uint16_t mminw(uintptr_t addr) {
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uint16_t ret;
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asm volatile (
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"movw %1, %0"
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"movw (%1), %0"
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: "=r" (ret)
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: "m" (WORD_PTR(addr))
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: "r" (addr)
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: "memory"
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);
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return ret;
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@ -117,24 +112,26 @@ inline uint16_t mminw(uintptr_t addr) {
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inline uint32_t mmind(uintptr_t addr) {
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uint32_t ret;
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asm volatile (
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"movl %1, %0"
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"movl (%1), %0"
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: "=r" (ret)
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: "m" (DWORD_PTR(addr))
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: "r" (addr)
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: "memory"
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);
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return ret;
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}
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#if defined (__x86_64__)
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inline uint64_t mminq(uintptr_t addr) {
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uint64_t ret;
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asm volatile (
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"movq %1, %0"
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"movq (%1), %0"
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: "=r" (ret)
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: "m" (QWORD_PTR(addr))
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: "r" (addr)
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: "memory"
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);
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return ret;
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}
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#endif
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inline uint64_t rdmsr(uint32_t msr) {
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uint32_t edx, eax;
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