misc: Fixes for GCC 12 warnings; add extern prototypes for inline functions

This commit is contained in:
mintsuki 2022-01-26 03:58:28 +01:00
parent 8ccd4199b0
commit ddf85ede0a
7 changed files with 53 additions and 33 deletions

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@ -15,4 +15,4 @@ jobs:
run: sudo apt-get update && sudo apt-get install git build-essential autoconf automake nasm curl mtools -y
- name: Build the bootloader
run: ./autogen.sh && make all
run: ./autogen.sh --enable-werror && make all

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@ -37,9 +37,9 @@ test "x$LIMINE_OBJDUMP" = "x" && LIMINE_OBJDUMP='$(TOOLCHAIN)-objdump'
AC_ARG_VAR(LIMINE_READELF, [Readelf command for Limine [$(TOOLCHAIN)-readelf]])
test "x$LIMINE_READELF" = "x" && LIMINE_READELF='$(TOOLCHAIN)-readelf'
werror_state="yes"
werror_state="no"
AC_ARG_ENABLE([werror],
AS_HELP_STRING([--disable-werror], [do not treat warnings as errors]),
AS_HELP_STRING([--enable-werror], [treat warnings as errors]),
werror_state="$enableval")
if test "$werror_state" = "yes"; then

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@ -4,7 +4,7 @@
#include <stdint.h>
#include <stddef.h>
#define EBDA ((size_t)(*((uint16_t *)0x40e)) * 16)
#define EBDA ((size_t)(*((volatile uint16_t *)0x40e)) * 16)
struct sdt {
char signature[4];
@ -53,7 +53,7 @@ struct smbios_entry_point_32 {
char formatted_area[5];
char intermediate_anchor_str[5];
/// Checksum for values from intermediate anchor str to the
/// Checksum for values from intermediate anchor str to the
/// end of table.
uint8_t intermediate_checksum;
/// Total length of SMBIOS Structure Table, pointed to by the structure

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@ -10,6 +10,8 @@
#include <lib/print.h>
#include <mm/pmm.h>
extern void reset_term(void);
bool early_term = false;
void term_deinit(void) {

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@ -19,7 +19,6 @@
#if bios == 1
__attribute__((noinline))
__attribute__((section(".realmode")))
static void spinup(uint8_t drive) {
struct idtr real_mode_idt;

22
stage23/sys/cpu.c Normal file
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@ -0,0 +1,22 @@
#include <sys/cpu.h>
extern bool cpuid(uint32_t leaf, uint32_t subleaf,
uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx);
extern void outb(uint16_t port, uint8_t value);
extern void outw(uint16_t port, uint16_t value);
extern void outd(uint16_t port, uint32_t value);
extern uint8_t inb(uint16_t port);
extern uint16_t inw(uint16_t port);
extern uint32_t ind(uint16_t port);
extern void mmoutb(uintptr_t addr, uint8_t value);
extern void mmoutw(uintptr_t addr, uint16_t value);
extern void mmoutd(uintptr_t addr, uint32_t value);
extern void mmoutq(uintptr_t addr, uint64_t value);
extern uint8_t mminb(uintptr_t addr);
extern uint16_t mminw(uintptr_t addr);
extern uint32_t mmind(uintptr_t addr);
extern uint64_t mminq(uintptr_t addr);
extern uint64_t rdmsr(uint32_t msr);
extern void wrmsr(uint32_t msr, uint64_t value);
extern uint64_t rdtsc(void);
extern void delay(uint64_t cycles);

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@ -4,13 +4,6 @@
#include <stdint.h>
#include <stdbool.h>
#define FLAT_PTR(PTR) (*((int(*)[])(PTR)))
#define BYTE_PTR(PTR) (*((uint8_t *)(PTR)))
#define WORD_PTR(PTR) (*((uint16_t *)(PTR)))
#define DWORD_PTR(PTR) (*((uint32_t *)(PTR)))
#define QWORD_PTR(PTR) (*((uint64_t *)(PTR)))
inline bool cpuid(uint32_t leaf, uint32_t subleaf,
uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) {
uint32_t cpuid_max;
@ -58,46 +51,48 @@ inline uint32_t ind(uint16_t port) {
inline void mmoutb(uintptr_t addr, uint8_t value) {
asm volatile (
"movb %1, %0"
: "=m" (BYTE_PTR(addr))
: "ir" (value)
"movb %1, (%0)"
:
: "r" (addr), "ir" (value)
: "memory"
);
}
inline void mmoutw(uintptr_t addr, uint16_t value) {
asm volatile (
"movw %1, %0"
: "=m" (WORD_PTR(addr))
: "ir" (value)
"movw %1, (%0)"
:
: "r" (addr), "ir" (value)
: "memory"
);
}
inline void mmoutd(uintptr_t addr, uint32_t value) {
asm volatile (
"movl %1, %0"
: "=m" (DWORD_PTR(addr))
: "ir" (value)
"movl %1, (%0)"
:
: "r" (addr), "ir" (value)
: "memory"
);
}
#if defined (__x86_64__)
inline void mmoutq(uintptr_t addr, uint64_t value) {
asm volatile (
"movq %1, %0"
: "=m" (QWORD_PTR(addr))
: "ir" (value)
"movq %1, (%0)"
:
: "r" (addr), "r" (value)
: "memory"
);
}
#endif
inline uint8_t mminb(uintptr_t addr) {
uint8_t ret;
asm volatile (
"movb %1, %0"
"movb (%1), %0"
: "=r" (ret)
: "m" (BYTE_PTR(addr))
: "r" (addr)
: "memory"
);
return ret;
@ -106,9 +101,9 @@ inline uint8_t mminb(uintptr_t addr) {
inline uint16_t mminw(uintptr_t addr) {
uint16_t ret;
asm volatile (
"movw %1, %0"
"movw (%1), %0"
: "=r" (ret)
: "m" (WORD_PTR(addr))
: "r" (addr)
: "memory"
);
return ret;
@ -117,24 +112,26 @@ inline uint16_t mminw(uintptr_t addr) {
inline uint32_t mmind(uintptr_t addr) {
uint32_t ret;
asm volatile (
"movl %1, %0"
"movl (%1), %0"
: "=r" (ret)
: "m" (DWORD_PTR(addr))
: "r" (addr)
: "memory"
);
return ret;
}
#if defined (__x86_64__)
inline uint64_t mminq(uintptr_t addr) {
uint64_t ret;
asm volatile (
"movq %1, %0"
"movq (%1), %0"
: "=r" (ret)
: "m" (QWORD_PTR(addr))
: "r" (addr)
: "memory"
);
return ret;
}
#endif
inline uint64_t rdmsr(uint32_t msr) {
uint32_t edx, eax;