stivale: Load up invalid IDT before jumping to kernel instead of leaking internal one
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@ -14,6 +14,15 @@ __attribute__((noreturn)) void stivale_spinup_32(
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(uint64_t)stack_lo | ((uint64_t)stack_hi << 32)
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(uint64_t)stack_lo | ((uint64_t)stack_hi << 32)
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};
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};
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// Load invalid IDT
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uint64_t invalid_idt[2] = {0, 0};
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asm volatile (
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"lidt %0"
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:
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: "m" (invalid_idt)
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: "memory"
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);
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if (bits == 64) {
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if (bits == 64) {
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if (level5pg) {
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if (level5pg) {
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// Enable CR4.LA57
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// Enable CR4.LA57
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@ -8,6 +8,7 @@ smp_trampoline:
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mov ebx, cs
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mov ebx, cs
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shl ebx, 4
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shl ebx, 4
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o32 lidt [cs:invalid_idt]
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o32 lgdt [cs:passed_info.gdtr]
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o32 lgdt [cs:passed_info.gdtr]
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lea eax, [ebx + .mode32]
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lea eax, [ebx + .mode32]
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@ -157,9 +158,12 @@ parking64:
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align 16
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align 16
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temp_stack:
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temp_stack:
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times 1024 db 0
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times 128 db 0
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.top:
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.top:
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invalid_idt:
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times 2 dq 0
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align 16
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align 16
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passed_info:
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passed_info:
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.booted_flag db 0
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.booted_flag db 0
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