misc: Replace Intel-syntax inline assembly with GAS-syntax inline assembly; ensure we can build with clang
This commit is contained in:
mintsuki
parent
87cc5494c7
commit
6e78e33989
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@ -28,7 +28,6 @@ INTERNAL_CFLAGS = \
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-fno-pie \
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-fomit-frame-pointer \
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-Wno-address-of-packed-member \
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-masm=intel \
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-mno-80387 \
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-mno-mmx \
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-mno-3dnow \
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@ -10,12 +10,13 @@ void entry(uint8_t *compressed_stage2, size_t stage2_size, uint8_t boot_drive, i
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tinf_gzip_uncompress(dest, compressed_stage2, stage2_size);
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asm volatile (
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"mov esp, 0x7c00\n\t"
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"xor ebp, ebp\n\t"
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"push %1\n\t"
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"push %0\n\t"
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"push 0\n\t"
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"jmp 0x8000\n\t"
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"movl $0x7c00, %%esp\n\t"
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"xorl %%ebp, %%ebp\n\t"
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"pushl %1\n\t"
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"pushl %0\n\t"
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"pushl $0\n\t"
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"pushl $0x8000\n\t"
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"ret\n\t"
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:
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: "r" ((uint32_t)boot_drive), "r" (pxe)
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: "memory"
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@ -51,7 +51,6 @@ INTERNAL_CFLAGS := \
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-fno-lto \
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-fno-pic \
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-Wno-address-of-packed-member \
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-masm=intel \
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-mno-80387 \
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-mno-mmx \
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-mno-3dnow \
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@ -24,15 +24,16 @@ void stage3_common(void);
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#if defined (uefi)
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__attribute__((naked))
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EFI_STATUS efi_main(EFI_HANDLE ImageHandle, EFI_SYSTEM_TABLE *SystemTable) {
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EFI_STATUS efi_main(
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__attribute__((unused)) EFI_HANDLE ImageHandle,
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__attribute__((unused)) EFI_SYSTEM_TABLE *SystemTable) {
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// Invalid return address of 0 to end stacktraces here
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asm (
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"push 0\n\t"
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"push 0\n\t"
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"xor eax, eax\n\t"
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"pushq $0\n\t"
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"pushq $0\n\t"
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"xorl %eax, %eax\n\t"
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"jmp uefi_entry\n\t"
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);
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(void)ImageHandle; (void)SystemTable;
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}
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__attribute__((noreturn))
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@ -49,9 +49,9 @@ void print_stacktrace(size_t *base_ptr) {
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if (base_ptr == NULL) {
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asm volatile (
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#if defined (bios)
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"mov %0, ebp"
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"movl %%ebp, %0"
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#elif defined (uefi)
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"mov %0, rbp"
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"movq %%rbp, %0"
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#endif
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: "=g"(base_ptr)
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:: "memory"
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@ -21,42 +21,46 @@
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__attribute__((noinline))
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__attribute__((section(".realmode")))
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static void spinup(uint8_t drive) {
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struct idtr real_mode_idt = { 0x3ff, 0x0 };
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struct idtr real_mode_idt;
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real_mode_idt.limit = 0x3ff;
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real_mode_idt.ptr = 0;
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asm volatile (
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"cli\n\t"
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"cld\n\t"
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"lidt [eax]\n\t"
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"lidt (%%eax)\n\t"
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"jmp 0x08:1f\n\t"
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"pushl $0x08\n\t"
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"pushl $1f\n\t"
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"lret\n\t"
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"1: .code16\n\t"
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"mov ax, 0x10\n\t"
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"mov ds, ax\n\t"
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"mov es, ax\n\t"
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"mov fs, ax\n\t"
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"mov gs, ax\n\t"
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"mov ss, ax\n\t"
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"mov eax, cr0\n\t"
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"and al, 0xfe\n\t"
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"mov cr0, eax\n\t"
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"mov eax, OFFSET 1f\n\t"
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"push 0\n\t"
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"push ax\n\t"
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"retf\n\t"
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"movw $0x10, %%ax\n\t"
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"movw %%ax, %%ds\n\t"
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"movw %%ax, %%es\n\t"
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"movw %%ax, %%fs\n\t"
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"movw %%ax, %%gs\n\t"
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"movw %%ax, %%ss\n\t"
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"movl %%cr0, %%eax\n\t"
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"andb $0xfe, %%al\n\t"
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"movl %%eax, %%cr0\n\t"
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"movl $1f, %%eax\n\t"
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"pushw $0\n\t"
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"pushw %%ax\n\t"
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"lret\n\t"
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"1:\n\t"
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"mov ax, 0\n\t"
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"mov ds, ax\n\t"
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"mov es, ax\n\t"
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"mov fs, ax\n\t"
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"mov gs, ax\n\t"
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"mov ss, ax\n\t"
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"xorw %%ax, %%ax\n\t"
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"movw %%ax, %%ds\n\t"
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"movw %%ax, %%es\n\t"
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"movw %%ax, %%fs\n\t"
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"movw %%ax, %%gs\n\t"
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"movw %%ax, %%ss\n\t"
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"sti\n\t"
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"push 0\n\t"
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"push 0x7c00\n\t"
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"retf\n\t"
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"pushw $0\n\t"
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"pushw $0x7c00\n\t"
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"lret\n\t"
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".code32\n\t"
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:
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@ -1,38 +1,32 @@
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#include <sys/gdt.h>
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__attribute__((noreturn)) void linux_spinup(void *entry, void *boot_params) {
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struct gdt_desc linux_gdt_descs[] = {
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{0},
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struct gdt_desc linux_gdt_descs[4];
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linux_gdt_descs[0] = (struct gdt_desc){0};
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linux_gdt_descs[1] = (struct gdt_desc){0};
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{0},
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{
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.limit = 0xffff,
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.base_low = 0x0000,
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.base_mid = 0x00,
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.access = 0b10011010,
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.granularity = 0b11001111,
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.base_hi = 0x00
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},
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{
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.limit = 0xffff,
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.base_low = 0x0000,
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.base_mid = 0x00,
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.access = 0b10010010,
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.granularity = 0b11001111,
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.base_hi = 0x00
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}
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linux_gdt_descs[2] = (struct gdt_desc){
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.limit = 0xffff,
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.base_low = 0x0000,
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.base_mid = 0x00,
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.access = 0b10011010,
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.granularity = 0b11001111,
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.base_hi = 0x00
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};
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struct gdtr linux_gdt = {
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sizeof(linux_gdt_descs) - 1,
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(uintptr_t)linux_gdt_descs,
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#if defined (bios)
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0
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#endif
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linux_gdt_descs[3] = (struct gdt_desc){
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.limit = 0xffff,
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.base_low = 0x0000,
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.base_mid = 0x00,
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.access = 0b10010010,
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.granularity = 0b11001111,
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.base_hi = 0x00
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};
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struct gdtr linux_gdt;
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linux_gdt.limit = sizeof(linux_gdt_descs) - 1;
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linux_gdt.ptr = (uintptr_t)linux_gdt_descs;
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// Load invalid IDT
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uint64_t invalid_idt[2] = {0, 0};
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asm volatile (
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@ -45,24 +39,24 @@ __attribute__((noreturn)) void linux_spinup(void *entry, void *boot_params) {
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asm volatile (
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"lgdt %0\n\t"
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"push 0x10\n\t"
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"pushl $0x10\n\t"
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"call 1f\n\t"
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"1:\n\t"
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"add dword ptr [esp], 5\n\t"
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"retf\n\t"
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"addl $5, (%%esp)\n\t"
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"lret\n\t"
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"mov eax, 0x18\n\t"
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"mov ds, eax\n\t"
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"mov es, eax\n\t"
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"mov fs, eax\n\t"
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"mov gs, eax\n\t"
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"mov ss, eax\n\t"
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"movl $0x18, %%eax\n\t"
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"movl %%eax, %%ds\n\t"
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"movl %%eax, %%es\n\t"
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"movl %%eax, %%fs\n\t"
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"movl %%eax, %%gs\n\t"
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"movl %%eax, %%ss\n\t"
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"xor ebp, ebp\n\t"
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"xor edi, edi\n\t"
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"xor ebx, ebx\n\t"
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"xorl %%ebp, %%ebp\n\t"
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"xorl %%edi, %%edi\n\t"
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"xorl %%ebx, %%ebx\n\t"
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"jmp ecx\n\t"
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"jmp *(%%ecx)\n\t"
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:
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: "m"(linux_gdt), "c"(entry), "S"(boot_params)
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: "memory"
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@ -27,78 +27,79 @@ __attribute__((noreturn)) void stivale_spinup_32(
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if (level5pg) {
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// Enable CR4.LA57
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asm volatile (
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"mov eax, cr4\n\t"
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"bts eax, 12\n\t"
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"mov cr4, eax\n\t" ::: "eax", "memory"
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"movl %%cr4, %%eax\n\t"
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"btsl $12, %%eax\n\t"
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"movl %%eax, %%cr4\n\t"
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::: "eax", "memory"
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);
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}
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asm volatile (
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"cli\n\t"
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"cld\n\t"
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"mov cr3, eax\n\t"
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"mov eax, cr4\n\t"
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"or eax, 1 << 5\n\t"
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"mov cr4, eax\n\t"
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"mov ecx, 0xc0000080\n\t"
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"movl %%eax, %%cr3\n\t"
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"movl %%cr4, %%eax\n\t"
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"btsl $5, %%eax\n\t"
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"movl %%eax, %%cr4\n\t"
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"movl $0xc0000080, %%ecx\n\t"
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"rdmsr\n\t"
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"or eax, 1 << 8\n\t"
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"btsl $8, %%eax\n\t"
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"wrmsr\n\t"
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"mov eax, cr0\n\t"
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"or eax, 1 << 31\n\t"
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"mov cr0, eax\n\t"
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"movl %%cr0, %%eax\n\t"
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"btsl $31, %%eax\n\t"
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"movl %%eax, %%cr0\n\t"
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"call 1f\n\t"
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"1: pop eax\n\t"
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"add eax, 8\n\t"
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"push 0x28\n\t"
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"push eax\n\t"
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"retf\n\t"
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"1: popl %%eax\n\t"
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"addl $8, %%eax\n\t"
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"pushl $0x28\n\t"
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"pushl %%eax\n\t"
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"lret\n\t"
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".code64\n\t"
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"mov ax, 0x30\n\t"
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"mov ds, ax\n\t"
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"mov es, ax\n\t"
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"mov fs, ax\n\t"
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"mov gs, ax\n\t"
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"mov ss, ax\n\t"
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"movl $0x30, %%eax\n\t"
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"movl %%eax, %%ds\n\t"
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"movl %%eax, %%es\n\t"
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"movl %%eax, %%fs\n\t"
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"movl %%eax, %%gs\n\t"
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"movl %%eax, %%ss\n\t"
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// Since we don't really know what is now present in the upper
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// 32 bits of the 64 bit registers, clear up the upper bits
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// of the register that points to the 64-bit casted value array.
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"mov esi, esi\n\t"
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"movl %%esi, %%esi\n\t"
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// Move in 64-bit values
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"mov rdi, qword ptr [rsi + 0]\n\t"
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"mov rbx, qword ptr [rsi + 8]\n\t"
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"mov rsi, qword ptr [rsi + 16]\n\t"
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"movq 0x00(%%rsi), %%rdi\n\t"
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"movq 0x08(%%rsi), %%rbx\n\t"
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"movq 0x10(%%rsi), %%rsi\n\t"
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// Let's pretend we push a return address
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"test rsi, rsi\n\t"
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"testq %%rsi, %%rsi\n\t"
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"jz 1f\n\t"
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"sub rsi, 8\n\t"
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"mov qword ptr [rsi], 0\n\t"
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"subq $8, %%rsi\n\t"
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"movq $0, (%%rsi)\n\t"
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"1:\n\t"
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"push 0x30\n\t"
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"push rsi\n\t"
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"pushq $0x30\n\t"
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"pushq %%rsi\n\t"
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"pushfq\n\t"
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"push 0x28\n\t"
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"push rbx\n\t"
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"pushq $0x28\n\t"
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"pushq %%rbx\n\t"
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"xor rax, rax\n\t"
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"xor rbx, rbx\n\t"
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"xor rcx, rcx\n\t"
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"xor rdx, rdx\n\t"
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"xor rsi, rsi\n\t"
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"xor rbp, rbp\n\t"
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"xor r8, r8\n\t"
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"xor r9, r9\n\t"
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"xor r10, r10\n\t"
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"xor r11, r11\n\t"
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"xor r12, r12\n\t"
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"xor r13, r13\n\t"
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"xor r14, r14\n\t"
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"xor r15, r15\n\t"
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"xorl %%eax, %%eax\n\t"
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"xorl %%ebx, %%ebx\n\t"
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"xorl %%ecx, %%ecx\n\t"
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"xorl %%edx, %%edx\n\t"
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"xorl %%esi, %%esi\n\t"
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"xorl %%ebp, %%ebp\n\t"
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"xorq %%r8, %%r8\n\t"
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"xorq %%r9, %%r9\n\t"
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"xorq %%r10, %%r10\n\t"
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"xorq %%r11, %%r11\n\t"
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"xorq %%r12, %%r12\n\t"
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"xorq %%r13, %%r13\n\t"
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"xorq %%r14, %%r14\n\t"
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"xorq %%r15, %%r15\n\t"
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"iretq\n\t"
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".code32\n\t"
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@ -111,21 +112,21 @@ __attribute__((noreturn)) void stivale_spinup_32(
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"cli\n\t"
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"cld\n\t"
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"mov esp, esi\n\t"
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"push edi\n\t"
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"push 0\n\t"
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"movl %%esp, %%esi\n\t"
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"pushl %%edi\n\t"
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"pushl $0\n\t"
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"pushfd\n\t"
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"push 0x18\n\t"
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"push ebx\n\t"
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"pushfl\n\t"
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"pushl $0x18\n\t"
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"pushl %%ebx\n\t"
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"xor eax, eax\n\t"
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"xor ebx, ebx\n\t"
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"xor ecx, ecx\n\t"
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"xor edx, edx\n\t"
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"xor esi, esi\n\t"
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"xor edi, edi\n\t"
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"xor ebp, ebp\n\t"
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"xorl %%eax, %%eax\n\t"
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"xorl %%ebx, %%ebx\n\t"
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"xorl %%ecx, %%ecx\n\t"
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"xorl %%edx, %%edx\n\t"
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"xorl %%esi, %%esi\n\t"
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"xorl %%edi, %%edi\n\t"
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"xorl %%ebp, %%ebp\n\t"
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"iret\n\t"
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:
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@ -27,38 +27,38 @@ static inline bool cpuid(uint32_t leaf, uint32_t subleaf,
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}
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static inline void outb(uint16_t port, uint8_t value) {
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asm volatile ("out %1, al" : : "a" (value), "Nd" (port) : "memory");
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asm volatile ("outb %%al, %1" : : "a" (value), "Nd" (port) : "memory");
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}
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static inline void outw(uint16_t port, uint16_t value) {
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asm volatile ("out %1, ax" : : "a" (value), "Nd" (port) : "memory");
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asm volatile ("outw %%ax, %1" : : "a" (value), "Nd" (port) : "memory");
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}
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||||
|
||||
static inline void outd(uint16_t port, uint32_t value) {
|
||||
asm volatile ("out %1, eax" : : "a" (value), "Nd" (port) : "memory");
|
||||
asm volatile ("outl %%eax, %1" : : "a" (value), "Nd" (port) : "memory");
|
||||
}
|
||||
|
||||
static inline uint8_t inb(uint16_t port) {
|
||||
uint8_t value;
|
||||
asm volatile ("in al, %1" : "=a" (value) : "Nd" (port) : "memory");
|
||||
asm volatile ("inb %1, %%al" : "=a" (value) : "Nd" (port) : "memory");
|
||||
return value;
|
||||
}
|
||||
|
||||
static inline uint16_t inw(uint16_t port) {
|
||||
uint16_t value;
|
||||
asm volatile ("in ax, %1" : "=a" (value) : "Nd" (port) : "memory");
|
||||
asm volatile ("inw %1, %%ax" : "=a" (value) : "Nd" (port) : "memory");
|
||||
return value;
|
||||
}
|
||||
|
||||
static inline uint32_t ind(uint16_t port) {
|
||||
uint32_t value;
|
||||
asm volatile ("in eax, %1" : "=a" (value) : "Nd" (port) : "memory");
|
||||
asm volatile ("inl %1, %%eax" : "=a" (value) : "Nd" (port) : "memory");
|
||||
return value;
|
||||
}
|
||||
|
||||
static inline void mmoutb(uintptr_t addr, uint8_t value) {
|
||||
asm volatile (
|
||||
"mov %0, %1"
|
||||
"movb %1, %0"
|
||||
: "=m" (BYTE_PTR(addr))
|
||||
: "ir" (value)
|
||||
: "memory"
|
||||
|
|
@ -67,7 +67,7 @@ static inline void mmoutb(uintptr_t addr, uint8_t value) {
|
|||
|
||||
static inline void mmoutw(uintptr_t addr, uint16_t value) {
|
||||
asm volatile (
|
||||
"mov %0, %1"
|
||||
"movw %1, %0"
|
||||
: "=m" (WORD_PTR(addr))
|
||||
: "ir" (value)
|
||||
: "memory"
|
||||
|
|
@ -76,7 +76,7 @@ static inline void mmoutw(uintptr_t addr, uint16_t value) {
|
|||
|
||||
static inline void mmoutd(uintptr_t addr, uint32_t value) {
|
||||
asm volatile (
|
||||
"mov %0, %1"
|
||||
"movl %1, %0"
|
||||
: "=m" (DWORD_PTR(addr))
|
||||
: "ir" (value)
|
||||
: "memory"
|
||||
|
|
@ -85,7 +85,7 @@ static inline void mmoutd(uintptr_t addr, uint32_t value) {
|
|||
|
||||
static inline void mmoutq(uintptr_t addr, uint64_t value) {
|
||||
asm volatile (
|
||||
"mov %0, %1"
|
||||
"movq %1, %0"
|
||||
: "=m" (QWORD_PTR(addr))
|
||||
: "ir" (value)
|
||||
: "memory"
|
||||
|
|
@ -95,7 +95,7 @@ static inline void mmoutq(uintptr_t addr, uint64_t value) {
|
|||
static inline uint8_t mminb(uintptr_t addr) {
|
||||
uint8_t ret;
|
||||
asm volatile (
|
||||
"mov %0, %1"
|
||||
"movb %1, %0"
|
||||
: "=r" (ret)
|
||||
: "m" (BYTE_PTR(addr))
|
||||
: "memory"
|
||||
|
|
@ -106,7 +106,7 @@ static inline uint8_t mminb(uintptr_t addr) {
|
|||
static inline uint16_t mminw(uintptr_t addr) {
|
||||
uint16_t ret;
|
||||
asm volatile (
|
||||
"mov %0, %1"
|
||||
"movw %1, %0"
|
||||
: "=r" (ret)
|
||||
: "m" (WORD_PTR(addr))
|
||||
: "memory"
|
||||
|
|
@ -117,7 +117,7 @@ static inline uint16_t mminw(uintptr_t addr) {
|
|||
static inline uint32_t mmind(uintptr_t addr) {
|
||||
uint32_t ret;
|
||||
asm volatile (
|
||||
"mov %0, %1"
|
||||
"movl %1, %0"
|
||||
: "=r" (ret)
|
||||
: "m" (DWORD_PTR(addr))
|
||||
: "memory"
|
||||
|
|
@ -128,7 +128,7 @@ static inline uint32_t mmind(uintptr_t addr) {
|
|||
static inline uint64_t mminq(uintptr_t addr) {
|
||||
uint64_t ret;
|
||||
asm volatile (
|
||||
"mov %0, %1"
|
||||
"movq %1, %0"
|
||||
: "=r" (ret)
|
||||
: "m" (QWORD_PTR(addr))
|
||||
: "memory"
|
||||
|
|
@ -155,19 +155,19 @@ static inline void wrmsr(uint32_t msr, uint64_t value) {
|
|||
}
|
||||
|
||||
#define write_cr(reg, val) ({ \
|
||||
asm volatile ("mov cr" reg ", %0" :: "r" (val) : "memory"); \
|
||||
asm volatile ("mov %0, %%cr" reg :: "r" (val) : "memory"); \
|
||||
})
|
||||
|
||||
#define read_cr(reg) ({ \
|
||||
size_t cr; \
|
||||
asm volatile ("mov %0, cr" reg : "=r" (cr) :: "memory"); \
|
||||
asm volatile ("mov %%cr" reg ", %0" : "=r" (cr) :: "memory"); \
|
||||
cr; \
|
||||
})
|
||||
|
||||
#define locked_read(var) ({ \
|
||||
typeof(*var) ret = 0; \
|
||||
asm volatile ( \
|
||||
"lock xadd %1, %0;" \
|
||||
"lock xadd %0, %1" \
|
||||
: "+r" (ret) \
|
||||
: "m" (*(var)) \
|
||||
: "memory" \
|
||||
|
|
@ -178,7 +178,7 @@ static inline void wrmsr(uint32_t msr, uint64_t value) {
|
|||
#define locked_write(var, val) ({ \
|
||||
typeof(*var) ret = val; \
|
||||
asm volatile ( \
|
||||
"lock xchg %1, %0;" \
|
||||
"lock xchg %0, %1" \
|
||||
: "+r" ((ret)) \
|
||||
: "m" (*(var)) \
|
||||
: "memory" \
|
||||
|
|
|
|||
Loading…
Reference in New Issue