misc: Update several macros
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16c5e98120
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65671d73c7
@ -74,7 +74,7 @@ struct volume *volume_get_by_bios_drive(int drive);
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bool volume_read(struct volume *part, void *buffer, uint64_t loc, uint64_t count);
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#define volume_iterate_parts(_VOLUME_, _BODY_) ({ \
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#define volume_iterate_parts(_VOLUME_, _BODY_) do { \
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struct volume *_VOLUME = _VOLUME_; \
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if (_VOLUME->pxe) { \
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do { \
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@ -101,6 +101,6 @@ bool volume_read(struct volume *part, void *buffer, uint64_t loc, uint64_t count
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_BODY_ \
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} \
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} \
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})
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} while (0)
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#endif
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@ -9,6 +9,8 @@ extern bool verbose;
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void print(const char *fmt, ...);
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void vprint(const char *fmt, va_list args);
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#define printv(FMT, ...) ({ if (verbose) print(FMT, ##__VA_ARGS__); })
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#define printv(FMT, ...) do { \
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if (verbose) print(FMT, ##__VA_ARGS__); \
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} while (0)
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#endif
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@ -59,7 +59,9 @@ static size_t get_multiboot2_info_size(
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ALIGN_UP(sizeof(struct multiboot_tag), MULTIBOOT_TAG_ALIGN); // end
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}
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#define append_tag(P, TAG) ({ (P) += ALIGN_UP((TAG)->size, MULTIBOOT_TAG_ALIGN); })
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#define append_tag(P, TAG) do { \
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(P) += ALIGN_UP((TAG)->size, MULTIBOOT_TAG_ALIGN); \
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} while (0)
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noreturn void multiboot2_load(char *config, char* cmdline) {
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struct file_handle *kernel_file;
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@ -167,58 +167,57 @@ inline void delay(uint64_t cycles) {
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}
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#define rdrand(type) ({ \
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type ret; \
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type rdrand__ret; \
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asm volatile ( \
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"1: " \
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"rdrand %0;" \
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"jnc 1b;" \
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: "=r" (ret) \
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: "=r" (rdrand__ret) \
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); \
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ret; \
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rdrand__ret; \
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})
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#define rdseed(type) ({ \
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type ret; \
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type rdseed__ret; \
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asm volatile ( \
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"1: " \
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"rdseed %0;" \
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"jnc 1b;" \
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: "=r" (ret) \
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: "=r" (rdseed__ret) \
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); \
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ret; \
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rdseed__ret; \
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})
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#define write_cr(reg, val) ({ \
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#define write_cr(reg, val) do { \
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asm volatile ("mov %0, %%cr" reg :: "r" (val) : "memory"); \
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})
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} while (0)
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#define read_cr(reg) ({ \
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size_t cr; \
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asm volatile ("mov %%cr" reg ", %0" : "=r" (cr) :: "memory"); \
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cr; \
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size_t read_cr__cr; \
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asm volatile ("mov %%cr" reg ", %0" : "=r" (read_cr__cr) :: "memory"); \
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read_cr__cr; \
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})
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#define locked_read(var) ({ \
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typeof(*var) ret = 0; \
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typeof(*var) locked_read__ret = 0; \
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asm volatile ( \
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"lock xadd %0, %1" \
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: "+r" (ret) \
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: "+r" (locked_read__ret) \
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: "m" (*(var)) \
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: "memory" \
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); \
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ret; \
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locked_read__ret; \
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})
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#define locked_write(var, val) ({ \
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typeof(*var) ret = val; \
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#define locked_write(var, val) do { \
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__auto_type locked_write__ret = val; \
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asm volatile ( \
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"lock xchg %0, %1" \
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: "+r" ((ret)) \
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: "+r" ((locked_write__ret)) \
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: "m" (*(var)) \
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: "memory" \
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); \
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ret; \
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})
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} while (0)
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#elif defined (__aarch64__)
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@ -229,14 +228,14 @@ inline uint64_t rdtsc(void) {
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}
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#define locked_read(var) ({ \
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typeof(*var) ret = 0; \
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typeof(*var) locked_read__ret = 0; \
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asm volatile ( \
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"ldar %0, %1" \
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: "=r" (ret) \
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: "=r" (locked_read__ret) \
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: "m" (*(var)) \
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: "memory" \
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); \
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ret; \
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locked_read__ret; \
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})
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inline size_t icache_line_size(void) {
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