Merge pull request #238 from qookei/fix-aa64-fbs
limine: Fix caching mode detection for multiple framebuffers on AArch64
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commit
32d7aa1815
@ -852,18 +852,21 @@ FEAT_END
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#endif
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#if defined (__aarch64__)
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uint64_t fb_attr = 0x00;
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if (fb.framebuffer_addr) {
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// Find the most restrictive caching mode from all framebuffers to use
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uint64_t fb_attr = (uint64_t)-1;
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for (size_t i = 0; i < fbs_count; i++) {
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int el = current_el();
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uint64_t res;
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// Figure out the caching mode used for this particular framebuffer
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if (el == 1) {
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asm volatile (
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"at s1e1w, %1\n\t"
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"isb\n\t"
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"mrs %0, par_el1"
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: "=r"(res)
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: "r"(fb.framebuffer_addr)
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: "r"(fbs[i].framebuffer_addr)
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: "memory");
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} else if (el == 2) {
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asm volatile (
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@ -871,7 +874,7 @@ FEAT_END
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"isb\n\t"
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"mrs %0, par_el1"
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: "=r"(res)
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: "r"(fb.framebuffer_addr)
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: "r"(fbs[i].framebuffer_addr)
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: "memory");
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} else {
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panic(false, "Unexpected EL in limine_load");
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@ -880,8 +883,26 @@ FEAT_END
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if (res & 1)
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panic(false, "Address translation for framebuffer failed");
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fb_attr = res >> 56;
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uint64_t new_attr = res >> 56;
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// Use whatever we find first
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if (fb_attr == (uint64_t)-1)
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fb_attr = new_attr;
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// Prefer Device memory over Normal memory
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else if ((fb_attr & 0b11110000) && !(new_attr & 0b11110000))
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fb_attr = new_attr;
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// Prefer tighter Device memory (lower values)
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else if (!(fb_attr & 0b11110000) && !(new_attr & 0b11110000) && fb_attr > new_attr)
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fb_attr = new_attr;
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// Use Normal non-cacheable otherwise (avoid trying to figure out how to downgrade inner vs outer).
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else if ((fb_attr & 0b11110000) && (new_attr & 0b11110000))
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fb_attr = 0b01000100; // Inner&outer Non-cacheable
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// Otherwise do nothing (fb_attr is already more restrictive than new_attr).
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}
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// If no framebuffers are found, just zero out the MAIR entry
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if (fb_attr == (uint64_t)-1)
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fb_attr = 0;
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#endif
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void *stack = ext_mem_alloc(stack_size) + stack_size;
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