limine: scale the maximum KASLR offset based on the address space size
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@ -273,6 +273,19 @@ uint64_t paging_mode_higher_half(int paging_mode) {
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}
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}
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int paging_mode_va_bits(int paging_mode) {
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switch (paging_mode) {
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case PAGING_MODE_RISCV_SV39:
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return 39;
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case PAGING_MODE_RISCV_SV48:
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return 48;
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case PAGING_MODE_RISCV_SV57:
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return 57;
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default:
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panic(false, "paging_mode_va_bits: invalid mode");
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}
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}
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int vmm_max_paging_mode(void)
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{
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static int max_level;
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@ -15,6 +15,8 @@
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#define PAGING_MODE_X86_64_4LVL 0
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#define PAGING_MODE_X86_64_5LVL 1
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#define paging_mode_va_bits(mode) ((mode) ? 57 : 48)
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static inline uint64_t paging_mode_higher_half(int paging_mode) {
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if (paging_mode == PAGING_MODE_X86_64_5LVL) {
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return 0xff00000000000000;
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@ -89,6 +91,8 @@ void map_page(pagemap_t pagemap, uint64_t virt_addr, uint64_t phys_addr, uint64_
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#define PAGING_MODE_RISCV_SV48 9
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#define PAGING_MODE_RISCV_SV57 10
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int paging_mode_va_bits(int paging_mode);
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enum page_size {
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Size4KiB,
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Size2MiB,
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@ -194,7 +194,8 @@ static void **requests;
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static void set_paging_mode(int paging_mode, bool kaslr) {
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direct_map_offset = paging_mode_higher_half(paging_mode);
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if (kaslr) {
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direct_map_offset += (rand64() & ~((uint64_t)0x40000000 - 1)) & 0xfffffffffff;
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uint64_t mask = ((uint64_t)1 << (paging_mode_va_bits(paging_mode) - 4)) - 1;
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direct_map_offset += (rand64() & ~((uint64_t)0x40000000 - 1)) & mask;
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}
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}
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