Adapt new vmm to 5-level paging as well
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mintsuki
parent
0c7e08d3c7
commit
1ccf8e34bc
@ -23,19 +23,35 @@ static pt_entry_t *get_next_level(pt_entry_t *current_level, size_t entry) {
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return ret;
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}
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pagemap_t new_pagemap(void) {
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return (pagemap_t)(size_t)balloc_aligned(PT_SIZE, PT_SIZE);
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pagemap_t new_pagemap(int lv) {
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pagemap_t pagemap;
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pagemap.levels = lv;
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pagemap.top_level = balloc_aligned(PT_SIZE, PT_SIZE);
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return pagemap;
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}
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void map_page(pagemap_t pagemap, uint64_t virt_addr, uint64_t phys_addr, uint64_t flags) {
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// Calculate the indices in the various tables using the virtual address
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size_t pml5_entry = (virt_addr & ((uint64_t)0x1ff << 48)) >> 48;
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size_t pml4_entry = (virt_addr & ((uint64_t)0x1ff << 39)) >> 39;
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size_t pml3_entry = (virt_addr & ((uint64_t)0x1ff << 30)) >> 30;
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size_t pml2_entry = (virt_addr & ((uint64_t)0x1ff << 21)) >> 21;
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pt_entry_t *pml4 = (pt_entry_t *)(size_t)pagemap;
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pt_entry_t *pml3 = get_next_level(pml4, pml4_entry);
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pt_entry_t *pml2 = get_next_level(pml3, pml3_entry);
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pt_entry_t *pml5, *pml4, *pml3, *pml2;
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// Paging levels
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switch (pagemap.levels) {
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case 5:
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pml5 = pagemap.top_level;
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pml4 = get_next_level(pml5, pml5_entry);
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break;
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case 4:
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pml4 = pagemap.top_level;
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break;
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}
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pml3 = get_next_level(pml4, pml4_entry);
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pml2 = get_next_level(pml3, pml3_entry);
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// Set the entry as present and point it to the passed physical address
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// Also set the specified flags
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@ -5,9 +5,12 @@
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#define PAGE_SIZE ((uint64_t)0x200000)
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typedef uint64_t pagemap_t;
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typedef struct {
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int levels;
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void *top_level;
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} pagemap_t;
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pagemap_t new_pagemap(void);
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pagemap_t new_pagemap(int lv);
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void map_page(pagemap_t pagemap, uint64_t virt_addr, uint64_t phys_addr, uint64_t flags);
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#endif
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@ -262,7 +262,6 @@ __attribute__((noreturn)) void stivale_spinup(int bits, bool level5pg,
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pic_flush();
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if (bits == 64) {
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void *pagemap_ptr;
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if (level5pg) {
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// Enable CR4.LA57
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ASM(
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@ -270,55 +269,19 @@ __attribute__((noreturn)) void stivale_spinup(int bits, bool level5pg,
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"bts eax, 12\n\t"
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"mov cr4, eax\n\t", :: "eax", "memory"
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);
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}
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struct pagemap {
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uint64_t pml5[512];
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uint64_t pml4_lo[512];
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uint64_t pml4_hi[512];
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uint64_t pml3_lo[512];
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uint64_t pml3_hi[512];
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uint64_t pml2_0gb[512];
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uint64_t pml2_1gb[512];
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uint64_t pml2_2gb[512];
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uint64_t pml2_3gb[512];
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};
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struct pagemap *pagemap = balloc_aligned(sizeof(struct pagemap), 0x1000);
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pagemap_ptr = (void *)pagemap;
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pagemap_t pagemap = new_pagemap(level5pg ? 5 : 4);
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// zero out the pagemap
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for (uint64_t *p = (uint64_t *)pagemap; p < &pagemap->pml3_hi[512]; p++)
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*p = 0;
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// Map 0 to 2GiB at 0xffffffff80000000
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for (uint64_t i = 0; i < 0x80000000; i += PAGE_SIZE) {
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map_page(pagemap, i + 0xffffffff80000000, i, 0x03);
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}
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pagemap->pml5[511] = (uint64_t)(size_t)pagemap->pml4_hi | 0x03;
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pagemap->pml5[0] = (uint64_t)(size_t)pagemap->pml4_lo | 0x03;
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pagemap->pml4_hi[511] = (uint64_t)(size_t)pagemap->pml3_hi | 0x03;
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pagemap->pml4_hi[256] = (uint64_t)(size_t)pagemap->pml3_lo | 0x03;
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pagemap->pml4_lo[0] = (uint64_t)(size_t)pagemap->pml3_lo | 0x03;
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pagemap->pml3_hi[510] = (uint64_t)(size_t)pagemap->pml2_0gb | 0x03;
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pagemap->pml3_hi[511] = (uint64_t)(size_t)pagemap->pml2_1gb | 0x03;
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pagemap->pml3_lo[0] = (uint64_t)(size_t)pagemap->pml2_0gb | 0x03;
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pagemap->pml3_lo[1] = (uint64_t)(size_t)pagemap->pml2_1gb | 0x03;
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pagemap->pml3_lo[2] = (uint64_t)(size_t)pagemap->pml2_2gb | 0x03;
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pagemap->pml3_lo[3] = (uint64_t)(size_t)pagemap->pml2_3gb | 0x03;
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// populate the page directories
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for (size_t i = 0; i < 512 * 4; i++)
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(&pagemap->pml2_0gb[0])[i] = (i * 0x200000) | 0x03 | (1 << 7);
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} else {
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pagemap_t pagemap = new_pagemap();
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// Map 0 to 2GiB at 0xffffffff80000000
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for (uint64_t i = 0; i < 0x80000000; i += PAGE_SIZE) {
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map_page(pagemap, i + 0xffffffff80000000, i, 0x03);
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}
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// Map 0 to 4GiB at 0xffff800000000000 and 0
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for (uint64_t i = 0; i < 0x100000000; i += PAGE_SIZE) {
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map_page(pagemap, i, i, 0x03);
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map_page(pagemap, i + 0xffff800000000000, i, 0x03);
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}
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pagemap_ptr = (void *)pagemap;
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// Map 0 to 4GiB at 0xffff800000000000 and 0
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for (uint64_t i = 0; i < 0x100000000; i += PAGE_SIZE) {
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map_page(pagemap, i, i, 0x03);
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map_page(pagemap, i + 0xffff800000000000, i, 0x03);
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}
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ASM(
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@ -367,7 +330,7 @@ __attribute__((noreturn)) void stivale_spinup(int bits, bool level5pg,
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"iretq\n\t"
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".code32\n\t",
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: "a" (pagemap_ptr), "b" (&entry_point),
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: "a" (pagemap.top_level), "b" (&entry_point),
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"D" (stivale_struct), "S" (&stack)
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: "memory"
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);
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@ -7,7 +7,13 @@ stivale_header:
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dq 0 ; entry point
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dq stack.top ; rsp
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dq 0 ; flags
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dq 0 ; tags
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dq lv5 ; tags
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section .rodata
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lv5:
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dq 0x932f477032007e8f
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dq 0
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section .bss
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