220 lines
5.7 KiB
C
220 lines
5.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/*
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* AMD MP2 I2C adapter driver
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*
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* Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
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* Elie Morisse <syniurge@gmail.com>
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*/
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#ifndef I2C_AMD_PCI_MP2_H
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#define I2C_AMD_PCI_MP2_H
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#include <linux/i2c.h>
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#include <linux/pci.h>
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#include <linux/pm_runtime.h>
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#define PCI_DEVICE_ID_AMD_MP2 0x15E6
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struct amd_i2c_common;
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struct amd_mp2_dev;
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enum {
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/* MP2 C2P Message Registers */
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AMD_C2P_MSG0 = 0x10500, /* MP2 Message for I2C0 */
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AMD_C2P_MSG1 = 0x10504, /* MP2 Message for I2C1 */
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AMD_C2P_MSG2 = 0x10508, /* DRAM Address Lo / Data 0 */
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AMD_C2P_MSG3 = 0x1050c, /* DRAM Address HI / Data 1 */
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AMD_C2P_MSG4 = 0x10510, /* Data 2 */
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AMD_C2P_MSG5 = 0x10514, /* Data 3 */
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AMD_C2P_MSG6 = 0x10518, /* Data 4 */
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AMD_C2P_MSG7 = 0x1051c, /* Data 5 */
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AMD_C2P_MSG8 = 0x10520, /* Data 6 */
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AMD_C2P_MSG9 = 0x10524, /* Data 7 */
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/* MP2 P2C Message Registers */
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AMD_P2C_MSG0 = 0x10680, /* Do not use */
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AMD_P2C_MSG1 = 0x10684, /* I2C0 interrupt register */
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AMD_P2C_MSG2 = 0x10688, /* I2C1 interrupt register */
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AMD_P2C_MSG3 = 0x1068C, /* MP2 debug info */
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AMD_P2C_MSG_INTEN = 0x10690, /* MP2 interrupt gen register */
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AMD_P2C_MSG_INTSTS = 0x10694, /* Interrupt status */
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};
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/* Command register data structures */
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#define i2c_none (-1)
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enum i2c_cmd {
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i2c_read = 0,
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i2c_write,
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i2c_enable,
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i2c_disable,
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number_of_sensor_discovered,
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is_mp2_active,
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invalid_cmd = 0xF,
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};
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enum speed_enum {
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speed100k = 0,
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speed400k = 1,
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speed1000k = 2,
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speed1400k = 3,
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speed3400k = 4
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};
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enum mem_type {
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use_dram = 0,
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use_c2pmsg = 1,
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};
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/**
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* union i2c_cmd_base : bit access of C2P commands
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* @i2c_cmd: bit 0..3 i2c R/W command
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* @bus_id: bit 4..7 i2c bus index
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* @slave_addr: bit 8..15 slave address
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* @length: bit 16..27 read/write length
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* @i2c_speed: bit 28..30 bus speed
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* @mem_type: bit 31 0-DRAM; 1-C2P msg o/p
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*/
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union i2c_cmd_base {
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u32 ul;
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struct {
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enum i2c_cmd i2c_cmd : 4;
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u8 bus_id : 4;
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u32 slave_addr : 8;
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u32 length : 12;
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enum speed_enum i2c_speed : 3;
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enum mem_type mem_type : 1;
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} s;
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};
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enum response_type {
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invalid_response = 0,
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command_success = 1,
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command_failed = 2,
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};
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enum status_type {
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i2c_readcomplete_event = 0,
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i2c_readfail_event = 1,
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i2c_writecomplete_event = 2,
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i2c_writefail_event = 3,
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i2c_busenable_complete = 4,
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i2c_busenable_failed = 5,
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i2c_busdisable_complete = 6,
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i2c_busdisable_failed = 7,
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invalid_data_length = 8,
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invalid_slave_address = 9,
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invalid_i2cbus_id = 10,
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invalid_dram_addr = 11,
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invalid_command = 12,
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mp2_active = 13,
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numberof_sensors_discovered_resp = 14,
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i2c_bus_notinitialized
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};
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/**
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* union i2c_event : bit access of P2C events
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* @response: bit 0..1 i2c response type
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* @status: bit 2..6 status_type
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* @mem_type: bit 7 0-DRAM; 1-C2P msg o/p
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* @bus_id: bit 8..11 i2c bus id
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* @length: bit 12..23 message length
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* @slave_addr: bit 24-31 slave address
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*/
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union i2c_event {
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u32 ul;
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struct {
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enum response_type response : 2;
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enum status_type status : 5;
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enum mem_type mem_type : 1;
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u8 bus_id : 4;
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u32 length : 12;
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u32 slave_addr : 8;
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} r;
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};
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/**
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* struct amd_i2c_common - per bus/i2c adapter context, shared
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* between the pci and the platform driver
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* @eventval: MP2 event value set by the IRQ handler
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* @mp2_dev: MP2 pci device this adapter is part of
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* @msg: i2c message
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* @cmd_completion: function called by the IRQ handler to signal
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* the platform driver
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* @reqcmd: requested i2c command type
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* @cmd_success: set to true if the MP2 responded to a command with
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* the expected status and response type
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* @bus_id: bus index
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* @i2c_speed: i2c bus speed determined by the slowest slave
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* @dma_buf: if msg length > 32, holds the DMA buffer virtual address
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* @dma_addr: if msg length > 32, holds the DMA buffer address
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*/
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struct amd_i2c_common {
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union i2c_event eventval;
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struct amd_mp2_dev *mp2_dev;
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struct i2c_msg *msg;
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void (*cmd_completion)(struct amd_i2c_common *i2c_common);
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enum i2c_cmd reqcmd;
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u8 cmd_success;
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u8 bus_id;
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enum speed_enum i2c_speed;
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u8 *dma_buf;
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dma_addr_t dma_addr;
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#ifdef CONFIG_PM
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int (*suspend)(struct amd_i2c_common *i2c_common);
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int (*resume)(struct amd_i2c_common *i2c_common);
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#endif /* CONFIG_PM */
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};
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/**
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* struct amd_mp2_dev - per PCI device context
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* @pci_dev: PCI driver node
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* @busses: MP2 devices may have up to two busses,
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* each bus corresponding to an i2c adapter
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* @mmio: iommapped registers
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* @c2p_lock: controls access to the C2P mailbox shared between
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* the two adapters
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* @c2p_lock_busid: id of the adapter which locked c2p_lock
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*/
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struct amd_mp2_dev {
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struct pci_dev *pci_dev;
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struct amd_i2c_common *busses[2];
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void __iomem *mmio;
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struct mutex c2p_lock;
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u8 c2p_lock_busid;
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unsigned int probed;
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};
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#define ndev_pdev(ndev) ((ndev)->pci_dev)
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#define ndev_name(ndev) pci_name(ndev_pdev(ndev))
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#define ndev_dev(ndev) (&ndev_pdev(ndev)->dev)
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#define work_amd_i2c_common(__work) \
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container_of(__work, struct amd_i2c_common, work.work)
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/* PCIe communication driver */
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int amd_mp2_rw(struct amd_i2c_common *i2c_common, enum i2c_cmd reqcmd);
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int amd_mp2_bus_enable_set(struct amd_i2c_common *i2c_common, bool enable);
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void amd_mp2_process_event(struct amd_i2c_common *i2c_common);
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void amd_mp2_rw_timeout(struct amd_i2c_common *i2c_common);
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int amd_mp2_register_cb(struct amd_i2c_common *i2c_common);
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int amd_mp2_unregister_cb(struct amd_i2c_common *i2c_common);
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struct amd_mp2_dev *amd_mp2_find_device(void);
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static inline void amd_mp2_pm_runtime_get(struct amd_mp2_dev *mp2_dev)
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{
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pm_runtime_get_sync(&mp2_dev->pci_dev->dev);
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}
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static inline void amd_mp2_pm_runtime_put(struct amd_mp2_dev *mp2_dev)
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{
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pm_runtime_mark_last_busy(&mp2_dev->pci_dev->dev);
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pm_runtime_put_autosuspend(&mp2_dev->pci_dev->dev);
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}
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#endif
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