115 lines
3.4 KiB
Diff
115 lines
3.4 KiB
Diff
From 78e578042362aecf9bc1c6a3d3c94462601da448 Mon Sep 17 00:00:00 2001
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Date: Mon, 29 Oct 2018 23:57:47 +0300
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Subject: [PATCH] Add %idr register parsing into flags
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---
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lib/librte_eal/common/arch/e2k/rte_cpuflags.c | 67 ++++++++++++++++++---------
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1 file changed, 45 insertions(+), 22 deletions(-)
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diff --git a/lib/librte_eal/common/arch/e2k/rte_cpuflags.c b/lib/librte_eal/common/arch/e2k/rte_cpuflags.c
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index b849586..220c53c 100644
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--- a/lib/librte_eal/common/arch/e2k/rte_cpuflags.c
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+++ b/lib/librte_eal/common/arch/e2k/rte_cpuflags.c
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@@ -54,9 +54,8 @@
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enum cpu_register_t {
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REG_NONE = 0,
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+ REG_IDR,
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REG_HWCAP,
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- REG_HWCAP2,
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- REG_PLATFORM,
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REG_MAX
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};
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@@ -76,31 +75,53 @@ struct feature_entry {
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[RTE_CPUFLAG_##name] = {reg, bit, #name},
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const struct feature_entry rte_cpu_feature_table[] = {
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-// FEAT_DEF(SWP, REG_HWCAP, 0)
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+ FEAT_DEF(V1, REG_IDR, 1)
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+ FEAT_DEF(V2, REG_IDR, 2)
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+ FEAT_DEF(V3, REG_IDR, 3)
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+ FEAT_DEF(V4, REG_IDR, 4)
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+ FEAT_DEF(V5, REG_IDR, 5)
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+ FEAT_DEF(V6, REG_IDR, 6)
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+ FEAT_DEF(V7, REG_IDR, 7)
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};
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/*
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* Read AUXV software register and get cpu features for E2K
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*/
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+#include<stdio.h>
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static void
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rte_cpu_get_features(hwcap_registers_t out)
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{
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- out=0;
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-// int auxv_fd;
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-// _Elfx_auxv_t auxv;
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-//
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-// auxv_fd = open("/proc/self/auxv", O_RDONLY);
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-// assert(auxv_fd);
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-// while (read(auxv_fd, &auxv, sizeof(auxv)) == sizeof(auxv)) {
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-// if (auxv.a_type == AT_HWCAP) {
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-// out[REG_HWCAP] = auxv.a_un.a_val;
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-// } else if (auxv.a_type == AT_HWCAP2) {
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-// out[REG_HWCAP2] = auxv.a_un.a_val;
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-// } else if (auxv.a_type == AT_PLATFORM) {
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-// if (!strcmp((const char *)auxv.a_un.a_val, PLATFORM_STR))
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-// out[REG_PLATFORM] = 0x0001;
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-// }
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-// }
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-// close(auxv_fd);
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+ uint64_t idr, mdl;
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+ typedef union e2k_idr {
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+ struct {
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+ uint32_t mdl:8;
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+ uint32_t res:6;
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+ uint32_t wbl:3;
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+ uint32_t core:5;
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+ uint32_t pn:8;
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+ } p;
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+ uint64_t r;
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+ } e2k_idr_t;
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+ __asm__ volatile (" rrd %%idr, %0 ": "=r"(idr)::);
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+ mdl = idr & 0xff;
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+ fprintf(stderr,"rte_cpu_get_features: idr %lx mdl %lx\n", idr, mdl);
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+ out[REG_IDR]=0;
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+ switch(mdl){
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+ case 0x1: out[REG_IDR] = 1<<1; break;
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+ case 0x2: out[REG_IDR] = 1<<2; break;
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+ case 0x3: out[REG_IDR] = 1<<3; break;
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+ case 0x4: out[REG_IDR] = 1<<2; break;
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+ case 0x6: out[REG_IDR] = 1<<2; break;
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+ case 0x7: out[REG_IDR] = 1<<4; break;
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+ case 0x8: out[REG_IDR] = 1<<4; break;
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+ case 0x9: out[REG_IDR] = 1<<5; break;
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+ case 0xa: out[REG_IDR] = 1<<6; break;
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+ case 0xb: out[REG_IDR] = 1<<6; break;
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+ case 0xc: out[REG_IDR] = 1<<6; break;
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+ }
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+ if(mdl >= 0xd) {
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+ out[REG_IDR] = 1<<6;
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+ }
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+ out[REG_IDR] = out[REG_IDR] | (out[REG_IDR]-1);
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}
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/*
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@@ -115,11 +136,13 @@ rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)
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if (feature >= RTE_CPUFLAG_NUMFLAGS)
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return -ENOENT;
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-// feat = &rte_cpu_feature_table[feature];
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-// if (feat->reg == REG_NONE)
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+ feat = &rte_cpu_feature_table[feature];
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+ if (feat->reg == REG_NONE)
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return -EFAULT;
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+ fprintf(stderr,"before rte_cpu_get_features: \n");
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rte_cpu_get_features(regs);
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+ fprintf(stderr,"after rte_cpu_get_features: feat %d reg %d bit %d \n", feature, feat->reg, feat->bit);
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return (regs[feat->reg] >> feat->bit) & 1;
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}
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--
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2.16.4
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