From 01062353d49b2b2f1719feff0fc03b94501ba22f Mon Sep 17 00:00:00 2001 Date: Sun, 20 Oct 2019 23:47:48 +0300 Subject: [PATCH 1/5] UCS e2k arch patch --- src/ucs/arch/atomic.h | 2 ++ src/ucs/arch/bitops.h | 2 ++ src/ucs/arch/cpu.h | 2 ++ src/ucs/arch/e2k/atomic.h | 40 ++++++++++++++++++++++++ src/ucs/arch/e2k/bitops.h | 28 +++++++++++++++++ src/ucs/arch/e2k/cpu.h | 77 +++++++++++++++++++++++++++++++++++++++++++++++ 6 files changed, 151 insertions(+) create mode 100644 src/ucs/arch/e2k/atomic.h create mode 100644 src/ucs/arch/e2k/bitops.h create mode 100644 src/ucs/arch/e2k/cpu.h diff --git a/src/ucs/arch/atomic.h b/src/ucs/arch/atomic.h index 0caea9b..1ad7a8e 100644 --- a/src/ucs/arch/atomic.h +++ b/src/ucs/arch/atomic.h @@ -15,6 +15,8 @@ # include "generic/atomic.h" #elif defined(__aarch64__) # include "generic/atomic.h" +#elif defined(__e2k__) +# include "generic/atomic.h" #else # error "Unsupported architecture" #endif diff --git a/src/ucs/arch/bitops.h b/src/ucs/arch/bitops.h index 2049b7c..f349bba 100644 --- a/src/ucs/arch/bitops.h +++ b/src/ucs/arch/bitops.h @@ -14,6 +14,8 @@ # include "ppc64/bitops.h" #elif defined(__aarch64__) # include "aarch64/bitops.h" +#elif defined(__e2k__) +# include "e2k/bitops.h" #else # error "Unsupported architecture" #endif diff --git a/src/ucs/arch/cpu.h b/src/ucs/arch/cpu.h index 58a8382..439ffeb 100644 --- a/src/ucs/arch/cpu.h +++ b/src/ucs/arch/cpu.h @@ -59,6 +59,8 @@ typedef enum ucs_cpu_flag { # include "ppc64/cpu.h" #elif defined(__aarch64__) # include "aarch64/cpu.h" +#elif defined(__e2k__) +# include "e2k/cpu.h" #else # error "Unsupported architecture" #endif diff --git a/src/ucs/arch/e2k/atomic.h b/src/ucs/arch/e2k/atomic.h new file mode 100644 index 0000000..c9316e1 --- /dev/null +++ b/src/ucs/arch/e2k/atomic.h @@ -0,0 +1,41 @@ +/** +* Copyright (C) AO MCST 2019-2020. +* Copyright (C) Mellanox Technologies Ltd. 2001-2015. ALL RIGHTS RESERVED. +* +* See file LICENSE for terms. +*/ + +#ifndef UCS_GENERIC_ATOMIC_H_ +#define UCS_GENERIC_ATOMIC_H_ + + +#define UCS_DEFINE_ATOMIC_ADD(wordsize, suffix) \ + static inline void ucs_atomic_add##wordsize(volatile uint##wordsize##_t *ptr, \ + uint##wordsize##_t value) { \ + __sync_add_and_fetch(ptr, value); \ + } + +#define UCS_DEFINE_ATOMIC_FADD(wordsize, suffix) \ + static inline uint##wordsize##_t ucs_atomic_fadd##wordsize(volatile uint##wordsize##_t *ptr, \ + uint##wordsize##_t value) { \ + return __sync_fetch_and_add(ptr, value); \ + } + +#define UCS_DEFINE_ATOMIC_SWAP(wordsize, suffix) \ + static inline uint##wordsize##_t ucs_atomic_swap##wordsize(volatile uint##wordsize##_t *ptr, \ + uint##wordsize##_t value) { \ + uint##wordsize##_t old; \ + do { \ + old = *ptr; \ + } while(old != __sync_val_compare_and_swap(ptr, old, value)); \ + return old; \ + } + +#define UCS_DEFINE_ATOMIC_CSWAP(wordsize, suffix) \ + static inline uint##wordsize##_t ucs_atomic_cswap##wordsize(volatile uint##wordsize##_t *ptr, \ + uint##wordsize##_t compare, \ + uint##wordsize##_t swap) { \ + return __sync_val_compare_and_swap(ptr, compare, swap); \ + } + +#endif diff --git a/src/ucs/arch/e2k/bitops.h b/src/ucs/arch/e2k/bitops.h new file mode 100644 index 0000000..0156b43 --- /dev/null +++ b/src/ucs/arch/e2k/bitops.h @@ -0,0 +1,29 @@ +/** +* Copyright (C) AO MCST 2019-2020. +* Copyright (C) Mellanox Technologies Ltd. 2001-2015. ALL RIGHTS RESERVED. +* +* See file LICENSE for terms. +*/ + +#ifndef UCS_PPC64_BITOPS_H_ +#define UCS_PPC64_BITOPS_H_ + +#include +#include + +static inline unsigned __ucs_ilog2_u32(uint32_t n) +{ + return __bsrd(n); +} + +static inline unsigned __ucs_ilog2_u64(uint64_t n) +{ + return __bsrq(n); +} + +static inline unsigned ucs_ffs64(uint64_t n) +{ + return __bsfq(n); +} + +#endif diff --git a/src/ucs/arch/e2k/cpu.h b/src/ucs/arch/e2k/cpu.h new file mode 100644 index 0000000..37caea5 --- /dev/null +++ b/src/ucs/arch/e2k/cpu.h @@ -0,0 +1,78 @@ +/** +* Copyright (C) AO MCST 2019-2020. +* Copyright (C) Mellanox Technologies Ltd. 2001-2015. ALL RIGHTS RESERVED. +* Copyright (C) ARM Ltd. 2016-2017. ALL RIGHTS RESERVED. +* +* See file LICENSE for terms. +*/ + +#ifndef UCS_E2K_CPU_H_ +#define UCS_E2K_CPU_H_ + +#include +#include +#include + +BEGIN_C_DECLS + +#define UCS_ARCH_CACHE_LINE_SIZE 64 + +/* Assume the worst - weak memory ordering */ +#define ucs_memory_bus_fence() asm volatile ("wait all_c=1 \n"::: "memory") +#define ucs_memory_bus_store_fence() ucs_memory_bus_fence() +#define ucs_memory_bus_load_fence() ucs_memory_bus_fence() +#define ucs_memory_bus_wc_flush() +#define ucs_memory_cpu_fence() ucs_memory_bus_fence() +#define ucs_memory_cpu_store_fence() ucs_memory_bus_fence() +#define ucs_memory_cpu_load_fence() asm volatile ("wait ld_c=1 \n" ::: "memory") +#define ucs_memory_cpu_wc_fence() ucs_memory_bus_fence() + + +static inline uint64_t ucs_arch_read_hres_clock(void) +{ +#if 0 + uint64_t tb; + asm volatile ("rrd %%clkr, %0\n" : "=r" (tb)); + return tb; +#else + struct timeval tv; + + if (gettimeofday(&tv, NULL) != 0) { + return 0; + } + return ((((uint64_t)(tv.tv_sec)) * 1000000ULL) + ((uint64_t)(tv.tv_usec))); +#endif +} + +static inline double ucs_arch_get_clocks_per_sec() +{ +#if 0 + /* frequency detector ? */ return 1.3E9; +#else + return 1.0E6; +#endif +} + +static inline void ucs_arch_wait_mem(void *address) +{ + __sync_synchronize(); +} + +static inline ucs_cpu_model_t ucs_arch_get_cpu_model() +{ + return UCS_CPU_MODEL_UNKNOWN; +} + +static inline int ucs_arch_get_cpu_flag() +{ + return UCS_CPU_FLAG_UNKNOWN; +} + +static inline void ucs_arch_clear_cache(void *start, void *end) { + // TODO +} + + +END_C_DECLS + +#endif -- 2.1.4