mirror of
https://github.com/KolibriOS/kolibrios.git
synced 2024-12-27 00:39:41 +03:00
84ab2d2d6b
git-svn-id: svn://kolibrios.org@3769 a494cfbc-eb01-0410-851d-a64ba20cac60
328 lines
11 KiB
C
328 lines
11 KiB
C
/*
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* Copyright (C) 2006-2012 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "sysdeps.h"
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#include <alloca.h>
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#include "intel_batchbuffer.h"
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#include "i965_decoder_utils.h"
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#include "i965_drv_video.h"
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#include "i965_defines.h"
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/* Set reference surface if backing store exists */
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static inline int
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set_ref_frame(
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struct i965_driver_data *i965,
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GenFrameStore *ref_frame,
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VASurfaceID va_surface
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)
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{
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struct object_surface *obj_surface;
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if (va_surface == VA_INVALID_ID)
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return 0;
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obj_surface = SURFACE(va_surface);
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if (!obj_surface || !obj_surface->bo)
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return 0;
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ref_frame->surface_id = va_surface;
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return 1;
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}
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/* Check wether codec layer incorrectly fills in slice_vertical_position */
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int
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mpeg2_wa_slice_vertical_position(
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struct decode_state *decode_state,
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VAPictureParameterBufferMPEG2 *pic_param
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)
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{
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unsigned int i, j, mb_height, vpos, last_vpos = 0;
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/* Assume progressive sequence if we got a progressive frame */
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if (pic_param->picture_coding_extension.bits.progressive_frame)
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return 0;
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/* Wait for a field coded picture */
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if (pic_param->picture_coding_extension.bits.picture_structure == MPEG_FRAME)
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return -1;
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assert(decode_state && decode_state->slice_params);
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mb_height = (pic_param->vertical_size + 31) / 32;
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for (j = 0; j < decode_state->num_slice_params; j++) {
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struct buffer_store * const buffer_store =
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decode_state->slice_params[j];
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for (i = 0; i < buffer_store->num_elements; i++) {
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VASliceParameterBufferMPEG2 * const slice_param =
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((VASliceParameterBufferMPEG2 *)buffer_store->buffer) + i;
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vpos = slice_param->slice_vertical_position;
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if (vpos >= mb_height || vpos == last_vpos + 2) {
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WARN_ONCE("codec layer incorrectly fills in MPEG-2 slice_vertical_position. Workaround applied\n");
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return 1;
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}
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last_vpos = vpos;
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}
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}
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return 0;
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}
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/* Build MPEG-2 reference frames array */
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void
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mpeg2_set_reference_surfaces(
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VADriverContextP ctx,
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GenFrameStore ref_frames[MAX_GEN_REFERENCE_FRAMES],
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struct decode_state *decode_state,
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VAPictureParameterBufferMPEG2 *pic_param
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)
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{
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struct i965_driver_data * const i965 = i965_driver_data(ctx);
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VASurfaceID va_surface;
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unsigned pic_structure, is_second_field, n = 0;
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pic_structure = pic_param->picture_coding_extension.bits.picture_structure;
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is_second_field = pic_structure != MPEG_FRAME &&
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!pic_param->picture_coding_extension.bits.is_first_field;
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ref_frames[0].surface_id = VA_INVALID_ID;
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/* Reference frames are indexed by frame store ID (0:top, 1:bottom) */
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switch (pic_param->picture_coding_type) {
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case MPEG_P_PICTURE:
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if (is_second_field && pic_structure == MPEG_BOTTOM_FIELD) {
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va_surface = decode_state->current_render_target;
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n += set_ref_frame(i965, &ref_frames[n], va_surface);
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}
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va_surface = pic_param->forward_reference_picture;
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n += set_ref_frame(i965, &ref_frames[n], va_surface);
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break;
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case MPEG_B_PICTURE:
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va_surface = pic_param->forward_reference_picture;
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n += set_ref_frame(i965, &ref_frames[n], va_surface);
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va_surface = pic_param->backward_reference_picture;
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n += set_ref_frame(i965, &ref_frames[n], va_surface);
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break;
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}
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while (n != 2)
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ref_frames[n++].surface_id = ref_frames[0].surface_id;
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if (pic_param->picture_coding_extension.bits.progressive_frame)
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return;
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ref_frames[2].surface_id = VA_INVALID_ID;
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/* Bottom field pictures used as reference */
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switch (pic_param->picture_coding_type) {
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case MPEG_P_PICTURE:
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if (is_second_field && pic_structure == MPEG_TOP_FIELD) {
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va_surface = decode_state->current_render_target;
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n += set_ref_frame(i965, &ref_frames[n], va_surface);
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}
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va_surface = pic_param->forward_reference_picture;
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n += set_ref_frame(i965, &ref_frames[n], va_surface);
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break;
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case MPEG_B_PICTURE:
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va_surface = pic_param->forward_reference_picture;
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n += set_ref_frame(i965, &ref_frames[n], va_surface);
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va_surface = pic_param->backward_reference_picture;
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n += set_ref_frame(i965, &ref_frames[n], va_surface);
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break;
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}
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while (n != 4)
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ref_frames[n++].surface_id = ref_frames[2].surface_id;
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}
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/* Generate flat scaling matrices for H.264 decoding */
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void
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avc_gen_default_iq_matrix(VAIQMatrixBufferH264 *iq_matrix)
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{
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/* Flat_4x4_16 */
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memset(&iq_matrix->ScalingList4x4, 16, sizeof(iq_matrix->ScalingList4x4));
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/* Flat_8x8_16 */
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memset(&iq_matrix->ScalingList8x8, 16, sizeof(iq_matrix->ScalingList8x8));
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}
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/* Get first macroblock bit offset for BSD, minus EPB count (AVC) */
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/* XXX: slice_data_bit_offset does not account for EPB */
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unsigned int
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avc_get_first_mb_bit_offset(
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dri_bo *slice_data_bo,
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VASliceParameterBufferH264 *slice_param,
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unsigned int mode_flag
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)
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{
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unsigned int slice_data_bit_offset = slice_param->slice_data_bit_offset;
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if (mode_flag == ENTROPY_CABAC)
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slice_data_bit_offset = ALIGN(slice_data_bit_offset, 0x8);
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return slice_data_bit_offset;
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}
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/* Get first macroblock bit offset for BSD, with EPB count (AVC) */
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/* XXX: slice_data_bit_offset does not account for EPB */
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unsigned int
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avc_get_first_mb_bit_offset_with_epb(
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dri_bo *slice_data_bo,
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VASliceParameterBufferH264 *slice_param,
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unsigned int mode_flag
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)
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{
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unsigned int in_slice_data_bit_offset = slice_param->slice_data_bit_offset;
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unsigned int out_slice_data_bit_offset;
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unsigned int i, j, n, buf_size, data_size, header_size;
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uint8_t *buf;
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int ret;
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header_size = slice_param->slice_data_bit_offset / 8;
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data_size = slice_param->slice_data_size - slice_param->slice_data_offset;
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buf_size = (header_size * 3 + 1) / 2; // Max possible header size (x1.5)
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if (buf_size > data_size)
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buf_size = data_size;
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buf = alloca(buf_size);
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ret = dri_bo_get_subdata(
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slice_data_bo, slice_param->slice_data_offset,
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buf_size, buf
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);
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assert(ret == 0);
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for (i = 2, j = 2, n = 0; i < buf_size && j < header_size; i++, j++) {
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if (buf[i] == 0x03 && buf[i - 1] == 0x00 && buf[i - 2] == 0x00)
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i += 2, j++, n++;
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}
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out_slice_data_bit_offset = in_slice_data_bit_offset + n * 8;
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if (mode_flag == ENTROPY_CABAC)
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out_slice_data_bit_offset = ALIGN(out_slice_data_bit_offset, 0x8);
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return out_slice_data_bit_offset;
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}
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static inline uint8_t
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get_ref_idx_state_1(const VAPictureH264 *va_pic, unsigned int frame_store_id)
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{
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const unsigned int is_long_term =
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!!(va_pic->flags & VA_PICTURE_H264_LONG_TERM_REFERENCE);
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const unsigned int is_top_field =
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!!(va_pic->flags & VA_PICTURE_H264_TOP_FIELD);
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const unsigned int is_bottom_field =
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!!(va_pic->flags & VA_PICTURE_H264_BOTTOM_FIELD);
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return ((is_long_term << 6) |
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((is_top_field ^ is_bottom_field ^ 1) << 5) |
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(frame_store_id << 1) |
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((is_top_field ^ 1) & is_bottom_field));
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}
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/* Fill in Reference List Entries (Gen5+: ILK, SNB, IVB) */
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void
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gen5_fill_avc_ref_idx_state(
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uint8_t state[32],
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const VAPictureH264 ref_list[32],
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unsigned int ref_list_count,
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const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
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)
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{
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unsigned int i, n, frame_idx;
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for (i = 0, n = 0; i < ref_list_count; i++) {
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const VAPictureH264 * const va_pic = &ref_list[i];
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if (va_pic->flags & VA_PICTURE_H264_INVALID)
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continue;
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for (frame_idx = 0; frame_idx < MAX_GEN_REFERENCE_FRAMES; frame_idx++) {
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const GenFrameStore * const fs = &frame_store[frame_idx];
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if (fs->surface_id != VA_INVALID_ID &&
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fs->surface_id == va_pic->picture_id) {
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assert(frame_idx == fs->frame_store_id);
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break;
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}
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}
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assert(frame_idx < MAX_GEN_REFERENCE_FRAMES);
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state[n++] = get_ref_idx_state_1(va_pic, frame_idx);
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}
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for (; n < 32; n++)
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state[n] = 0xff;
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}
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/* Emit Reference List Entries (Gen6+: SNB, IVB) */
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static void
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gen6_send_avc_ref_idx_state_1(
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struct intel_batchbuffer *batch,
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unsigned int list,
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const VAPictureH264 *ref_list,
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unsigned int ref_list_count,
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const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
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)
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{
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uint8_t ref_idx_state[32];
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BEGIN_BCS_BATCH(batch, 10);
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OUT_BCS_BATCH(batch, MFX_AVC_REF_IDX_STATE | (10 - 2));
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OUT_BCS_BATCH(batch, list);
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gen5_fill_avc_ref_idx_state(
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ref_idx_state,
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ref_list, ref_list_count,
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frame_store
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);
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intel_batchbuffer_data(batch, ref_idx_state, sizeof(ref_idx_state));
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ADVANCE_BCS_BATCH(batch);
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}
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void
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gen6_send_avc_ref_idx_state(
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struct intel_batchbuffer *batch,
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const VASliceParameterBufferH264 *slice_param,
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const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
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)
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{
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if (slice_param->slice_type == SLICE_TYPE_I ||
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slice_param->slice_type == SLICE_TYPE_SI)
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return;
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/* RefPicList0 */
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gen6_send_avc_ref_idx_state_1(
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batch, 0,
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slice_param->RefPicList0, slice_param->num_ref_idx_l0_active_minus1 + 1,
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frame_store
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);
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if (slice_param->slice_type != SLICE_TYPE_B)
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return;
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/* RefPicList1 */
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gen6_send_avc_ref_idx_state_1(
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batch, 1,
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slice_param->RefPicList1, slice_param->num_ref_idx_l1_active_minus1 + 1,
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frame_store
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);
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}
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