mirror of
https://github.com/KolibriOS/kolibrios.git
synced 2024-12-15 11:22:34 +03:00
268 lines
8.8 KiB
PHP
268 lines
8.8 KiB
PHP
;-----------------------------------------------------------------------------
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; find the IDE controller in the device list
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;-----------------------------------------------------------------------------
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mov esi, pcidev_list
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.loop:
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mov esi, [esi+PCIDEV.fd]
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cmp esi, pcidev_list
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jz .done
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mov eax, [esi+PCIDEV.class]
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shr eax, 4
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cmp eax, 0x01018
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jnz .loop
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.found:
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mov eax, [esi+PCIDEV.class]
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DEBUGF 1, 'K : IDE controller programming interface %x\n', eax
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mov [IDEContrProgrammingInterface], eax
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mov ah, [esi+PCIDEV.bus]
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mov al, 2
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mov bh, [esi+PCIDEV.devfn]
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;-----------------------------------------------------------------------------
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mov bl, 0x10
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push eax
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call pci_read_reg
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and eax, 0xFFFC
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cmp ax, 0
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je @f
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cmp ax, 1
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jne .show_BAR0
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@@:
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mov ax, 0x1F0
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.show_BAR0:
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DEBUGF 1, 'K : BAR0 IDE base addr %x\n', ax
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mov [StandardATABases], ax
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mov [hd_address_table], eax
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mov [hd_address_table+8], eax
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mov [IDE_BAR0_val], ax
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pop eax
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;-----------------------------------------------------------------------------
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mov bl, 0x14
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push eax
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call pci_read_reg
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and eax, 0xFFFC
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cmp ax, 0
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je @f
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cmp ax, 1
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jne .show_BAR1
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@@:
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mov ax, 0x3F4
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.show_BAR1:
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DEBUGF 1, 'K : BAR1 IDE base addr %x\n', ax
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mov [IDE_BAR1_val], ax
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pop eax
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;-----------------------------------------------------------------------------
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mov bl, 0x18
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push eax
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call pci_read_reg
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and eax, 0xFFFC
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cmp ax, 0
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je @f
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cmp ax, 1
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jne .show_BAR2
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@@:
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mov ax, 0x170
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.show_BAR2:
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DEBUGF 1, 'K : BAR2 IDE base addr %x\n', ax
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mov [StandardATABases+2], ax
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mov [hd_address_table+16], eax
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mov [hd_address_table+24], eax
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mov [IDE_BAR2_val], ax
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pop eax
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;-----------------------------------------------------------------------------
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mov bl, 0x1C
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push eax
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call pci_read_reg
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and eax, 0xFFFC
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cmp ax, 0
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je @f
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cmp ax, 1
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jne .show_BAR3
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@@:
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mov ax, 0x374
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.show_BAR3:
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DEBUGF 1, 'K : BAR3 IDE base addr %x\n', ax
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mov [IDE_BAR3_val], ax
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pop eax
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;-----------------------------------------------------------------------------
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mov bl, 0x20
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push eax
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call pci_read_reg
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and eax, 0xFFFC
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DEBUGF 1, 'K : BAR4 IDE controller register base addr %x\n', ax
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mov [IDEContrRegsBaseAddr], ax
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pop eax
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;-----------------------------------------------------------------------------
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mov bl, 0x3C
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push eax
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call pci_read_reg
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and eax, 0xFF
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DEBUGF 1, 'K : IDE Interrupt %x\n', al
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mov [IDE_Interrupt], ax
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pop eax
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;-----------------------------------------------------------------------------
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.done:
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;-----------------------------------------------------------------------------
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; START of initialisation IDE ATA code
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;-----------------------------------------------------------------------------
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cmp [IDEContrProgrammingInterface], 0
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je set_interrupts_for_IDE_controllers.continue
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mov esi, boot_disabling_ide
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call boot_log
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;--------------------------------------
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; Disable IDE interrupts, because the search
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; for IDE partitions is in the PIO mode.
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;--------------------------------------
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.disable_IDE_interrupt:
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; Disable interrupts in IDE controller for PIO
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mov al, 2
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mov dx, [IDE_BAR1_val] ;0x3F4
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add dx, 2 ;0x3F6
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out dx, al
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mov dx, [IDE_BAR3_val] ;0x374
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add dx, 2 ;0x376
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out dx, al
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@@:
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; show base variables of IDE controller
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; DEBUGF 1, "K : BAR0 %x \n", [IDE_BAR0_val]:4
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; DEBUGF 1, "K : BAR1 %x \n", [IDE_BAR1_val]:4
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; DEBUGF 1, "K : BAR2 %x \n", [IDE_BAR2_val]:4
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; DEBUGF 1, "K : BAR3 %x \n", [IDE_BAR3_val]:4
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; DEBUGF 1, "K : BAR4 %x \n", [IDEContrRegsBaseAddr]:4
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; DEBUGF 1, "K : IDEContrProgrammingInterface %x \n", [IDEContrProgrammingInterface]:4
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; DEBUGF 1, "K : IDE_Interrupt %x \n", [IDE_Interrupt]:4
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;-----------------------------------------------------------------------------
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mov esi, boot_detecthdcd
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call boot_log
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include 'dev_hdcd.inc'
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mov esi, boot_getcache
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call boot_log
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include 'getcache.inc'
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mov esi, boot_detectpart
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call boot_log
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include 'sear_par.inc'
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;-----------------------------------------------------------------------------
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mov dx, [IDEContrRegsBaseAddr]
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; test whether it is our interrupt?
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add dx, 2
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in al, dx
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test al, 100b
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jz @f
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; clear Bus Master IDE Status register
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; clear Interrupt bit
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out dx, al
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@@:
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add dx, 8
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; test whether it is our interrupt?
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in al, dx
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test al, 100b
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jz @f
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; clear Bus Master IDE Status register
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; clear Interrupt bit
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out dx, al
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@@:
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; read status register and remove the interrupt request
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mov dx, [IDE_BAR0_val] ;0x1F0
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add dx, 0x7 ;0x1F7
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in al, dx
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mov dx, [IDE_BAR2_val] ;0x170
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add dx, 0x7 ;0x177
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in al, dx
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;-----------------------------------------------------------------------------
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push eax edx
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mov dx, [IDEContrRegsBaseAddr]
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xor eax, eax
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add dx, 2
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in al, dx
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DEBUGF 1, "K : Primary Bus Master IDE Status Register %x\n", eax
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add dx, 8
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in al, dx
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DEBUGF 1, "K : Secondary Bus Master IDE Status Register %x\n", eax
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pop edx eax
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cmp [IDEContrRegsBaseAddr], 0
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setnz [dma_hdd]
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;-----------------------------------------------------------------------------
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; set interrupts for IDE Controller
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;-----------------------------------------------------------------------------
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mov esi, boot_set_int_IDE
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call boot_log
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set_interrupts_for_IDE_controllers:
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mov eax, [IDEContrProgrammingInterface]
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cmp ax, 0x0180
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je .pata_ide
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cmp ax, 0x018a
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jne .sata_ide
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;--------------------------------------
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.pata_ide:
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cmp [IDEContrRegsBaseAddr], 0
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je .end_set_interrupts
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stdcall attach_int_handler, 14, IDE_irq_14_handler, 0
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DEBUGF 1, "K : Set IDE IRQ14 return code %x\n", eax
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stdcall attach_int_handler, 15, IDE_irq_15_handler, 0
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DEBUGF 1, "K : Set IDE IRQ15 return code %x\n", eax
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jmp .enable_IDE_interrupt
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;--------------------------------------
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.sata_ide:
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cmp ax, 0x0185
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je .sata_ide_1
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cmp ax, 0x018f
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jne .end_set_interrupts
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;--------------------------------------
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.sata_ide_1:
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cmp [IDEContrRegsBaseAddr], 0
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je .end_set_interrupts
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mov ax, [IDE_Interrupt]
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movzx eax, al
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stdcall attach_int_handler, eax, IDE_common_irq_handler, 0
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DEBUGF 1, "K : Set IDE IRQ%d return code %x\n", [IDE_Interrupt]:1, eax
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;--------------------------------------
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.enable_IDE_interrupt:
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mov esi, boot_enabling_ide
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call boot_log
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; Enable interrupts in IDE controller for DMA
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mov al, 0
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mov ah, [DRIVE_DATA+1]
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test ah, 10100000b
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jz @f
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DEBUGF 1, "K : IDE CH1 PIO, because ATAPI drive present\n"
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jmp .ch2_check
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@@:
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mov dx, [IDE_BAR1_val] ;0x3F4
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add dx, 2 ;0x3F6
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out dx, al
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DEBUGF 1, "K : IDE CH1 DMA enabled\n"
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.ch2_check:
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test ah, 1010b
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jz @f
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DEBUGF 1, "K : IDE CH2 PIO, because ATAPI drive present\n"
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jmp .end_set_interrupts
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@@:
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mov dx, [IDE_BAR3_val] ;0x374
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add dx, 2 ;0x376
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out dx, al
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DEBUGF 1, "K : IDE CH2 DMA enabled\n"
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;--------------------------------------
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.end_set_interrupts:
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;-----------------------------------------------------------------------------
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cmp [dma_hdd], 0
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je .print_pio
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.print_dma:
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DEBUGF 1, "K : IDE DMA mode\n"
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jmp .continue
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.print_pio:
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DEBUGF 1, "K : IDE PIO mode\n"
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.continue:
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;-----------------------------------------------------------------------------
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; END of initialisation IDE ATA code
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;-----------------------------------------------------------------------------
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