mirror of
https://github.com/KolibriOS/kolibrios.git
synced 2024-12-04 06:11:55 +03:00
155 lines
3.5 KiB
C
Executable File
155 lines
3.5 KiB
C
Executable File
#include "pxa255_PwrClk.h"
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static Boolean pxa255pwrClkPrvCoprocRegXferFunc(struct ArmCpu* cpu, void* userData, Boolean two, Boolean read, UInt8 op1, UInt8 Rx, UInt8 CRn, UInt8 CRm, UInt8 op2){
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Pxa255pwrClk* pc = userData;
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UInt32 val = 0;
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if(!read) val = cpuGetRegExternal(cpu, Rx);
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if(CRm == 0 && op2 == 0 && op1 == 0 && !two){
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switch(CRn){
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case 6:
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if(read) val = 0;
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else{
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pc->turbo = (val & 1) != 0;
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if(val & 2){
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err_str("Set speed mode");
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// err_str("(CCCR + cp14 reg6) to 0x");
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// err_hex(pc->CCCR);
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// err_str(", 0x");
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// err_hex(val);
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// err_str("\r\n");
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}
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}
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case 7:
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if(read) val = pc->turbo ? 1 : 0;
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else if(val != 0){
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// fprintf(stderr, "Someone tried to set processor power mode (cp14 reg7) to 0x%08lX\n", val);
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}
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goto success;
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}
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}
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return false;
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success:
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if(read) cpuSetReg(cpu, Rx, val);
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return true;
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}
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static Boolean pxa255pwrClkPrvClockMgrMemAccessF(void* userData, UInt32 pa, UInt8 size, Boolean write, void* buf){
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Pxa255pwrClk* pc = userData;
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UInt32 val = 0;
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if(size != 4) {
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err_str(__FILE__ ": Unexpected ");
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// err_str(write ? "write" : "read");
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// err_str(" of ");
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// err_dec(size);
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// err_str(" bytes to 0x");
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// err_hex(pa);
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// err_str("\r\n");
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return true; //we do not support non-word accesses
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}
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pa = (pa - PXA255_CLOCK_MANAGER_BASE) >> 2;
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if(write) val = *(UInt32*)buf;
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switch(pa){
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case 0: //CCCR
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if(write) pc->CCCR = val;
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else val = pc->CCCR;
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break;
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case 1: //CKEN
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if(write) pc->CKEN = val;
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else val = pc->CKEN;
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break;
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case 2: //OSCR
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if(!write) val = pc->OSCR;
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//no writing to this register
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break;
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}
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if(!write) *(UInt32*)buf = val;
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return true;
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}
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static Boolean pxa255pwrClkPrvPowerMgrMemAccessF(void* userData, UInt32 pa, UInt8 size, Boolean write, void* buf){
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Pxa255pwrClk* pc = userData;
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UInt32 val = 0;
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if(size != 4) {
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err_str(__FILE__ ": Unexpected ");
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// err_str(write ? "write" : "read");
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// err_str(" of ");
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// err_dec(size);
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// err_str(" bytes to 0x");
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// err_hex(pa);
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// err_str("\r\n");
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return true; //we do not support non-word accesses
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}
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pa = (pa - PXA255_POWER_MANAGER_BASE) >> 2;
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if(write) val = *(UInt32*)buf;
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if(pa < 13){
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if(write) pc->pwrRegs[pa] = val;
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else val = pc->pwrRegs[pa];
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}
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if(!write) *(UInt32*)buf = val;
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return true;
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}
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Boolean pxa255pwrClkInit(Pxa255pwrClk* pc, ArmCpu* cpu, ArmMem* physMem){
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ArmCoprocessor cp;
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Boolean ok = true;
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__mem_zero(pc, sizeof(Pxa255pwrClk));
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pc->cpu = cpu;
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pc->CCCR = 0x00000122UL; //set CCCR to almost default value (we use mult 32 not 27)
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pc->CKEN = 0x000179EFUL; //set CKEN to default value
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pc->OSCR = 0x00000003UL; //32KHz oscillator on and stable
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pc->pwrRegs[1] = 0x20; //set PSSR
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pc->pwrRegs[3] = 3; //set PWER
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pc->pwrRegs[4] = 3; //set PRER
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pc->pwrRegs[5] = 3; //set PFER
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pc->pwrRegs[12] = 1; //set RCSR
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cp.regXfer = pxa255pwrClkPrvCoprocRegXferFunc;
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cp.dataProcessing = NULL;
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cp.memAccess = NULL;
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cp.twoRegF = NULL;
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cp.userData = pc;
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cpuCoprocessorRegister(cpu, 14, &cp);
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ok = ok && memRegionAdd(physMem, PXA255_CLOCK_MANAGER_BASE, PXA255_CLOCK_MANAGER_SIZE, pxa255pwrClkPrvClockMgrMemAccessF, pc);
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ok = ok && memRegionAdd(physMem, PXA255_POWER_MANAGER_BASE, PXA255_POWER_MANAGER_SIZE, pxa255pwrClkPrvPowerMgrMemAccessF, pc);
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return ok;
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}
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