567 lines
11 KiB
C++
567 lines
11 KiB
C++
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typedef unsigned int u32_t;
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typedef enum
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{
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VS_OUT_POS = 0,
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VS_OUT_PSIZE,
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VS_OUT_COL0,
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VS_OUT_COL1,
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VS_OUT_COL2,
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VS_OUT_COL3,
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VS_OUT_TEX0,
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VS_OUT_TEX1,
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VS_OUT_TEX2,
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VS_OUT_TEX3,
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VS_OUT_TEX4,
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VS_OUT_TEX5,
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VS_OUT_TEX6,
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VS_OUT_TEX7,
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VS_OUT_FOG,
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VS_OUT_MAX = 0xFFFFFFFF
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}v_out_t;
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#if 0
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vs_1_1
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dcl_position v0
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dcl_color v1
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dcl_color1 v2
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dcl_fog v3
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dcl_psize v4
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dcl_texcoord v5
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dcl_texcoord1 v6
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mov oPos, v0
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mov oD0, v1
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mov oD1, v2
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mov oFog, v3.x
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mov oPts, v4.x
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mov oT0, v5
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mov oT1, v6
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#endif
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const u32_t vs11[] =
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{
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0xfffe0101, 0x0000001f, 0x80000000, 0x900f0000, 0x0000001f, 0x8000000a,
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0x900f0001, 0x0000001f, 0x8001000a, 0x900f0002, 0x0000001f, 0x8000000b,
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0x900f0003, 0x0000001f, 0x80000004, 0x900f0004, 0x0000001f, 0x80000005,
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0x900f0005, 0x0000001f, 0x80010005, 0x900f0006, 0x00000001, 0xc00f0000,
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0x90e40000, 0x00000001, 0xd00f0000, 0x90e40001, 0x00000001, 0xd00f0001,
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0x90e40002, 0x00000001, 0xc00f0001, 0x90000003, 0x00000001, 0xc00f0002,
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0x90000004, 0x00000001, 0xe00f0000, 0x90e40005, 0x00000001, 0xe00f0001,
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0x90e40006, 0x0000ffff
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};
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char *sz_vs_command[] =
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{
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"nop",
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"mov",
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"add",
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"sub",
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"mad",
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"mul",
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"rcp",
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"rsq",
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"dp3",
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"dp4",
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"min",
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"max",
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"slt",
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"sge",
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"exp",
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"log",
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"lit",
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"dst",
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"lrp",
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"frc",
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"m4x4",
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"m4x3",
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"m3x4",
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"m3x3",
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"m3x2",
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};
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/*
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char *sz_ps_command[] =
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{
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texcoord
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texkill
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tex
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texbem
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texbeml
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texreg2ar
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texreg2gb
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texm3x2pad
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texm3x3tex
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texm3x3pad
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texm3x3tex
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texm3x3diff
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texm3x3spec
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texm3x3vspec
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expp
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logp
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cnd
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def
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texreg2rgb
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texdp3tex
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texm3x2depth
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texdp3
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texm3x3
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texdepth
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cmp
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bem
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}
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*/
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char *szusage[]=
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{
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"position",
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"blendweight",
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"blendindices",
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"normal",
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"psize",
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"texcoord",
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"tangent",
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"binormal",
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"tessfactor",
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"positiont",
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"color",
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"fog",
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"depth",
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"sample"
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};
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char *sztype[]=
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{
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"r",
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"v",
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"c"
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"a",
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"t",
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"rasout",
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"attrout",
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"texcrdout",
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"output",
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"constint",
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"colorout",
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"depthout",
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"sampler",
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"const2",
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"const3",
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"const4",
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"constbool",
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"loop",
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"tempfloat16",
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"misctype",
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"label",
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"predicate"
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};
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typedef struct
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{
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u32_t minor: 8;
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u32_t major: 8;
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u32_t type :16;
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}version_t;
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typedef struct
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{
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u32_t type:5;
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u32_t rsv :11;
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u32_t ind :4;
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u32_t rsv2:11;
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u32_t sign:1;
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}usage_t;
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typedef struct
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{
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u32_t ind :11;
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u32_t typeh :2;
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u32_t rsv :3;
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u32_t wr :4;
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u32_t mod :4;
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u32_t scale :4;
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u32_t typel :3;
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u32_t sign :1;
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}dst_t;
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typedef struct
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{
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u32_t ind :11;
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u32_t rsv :5;
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u32_t swzl :8;
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u32_t mod :4;
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u32_t typel :3;
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u32_t sign :1;
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}src_t;
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int parse_vs(const u32_t *stream);
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static void assign_outputs();
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int translate_vs(const u32_t *stream);
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u32_t vs_out_written;
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u32_t inp_mask;
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u32_t vs_outputs[16];
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int main()
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{
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version_t *ver;
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ver = (version_t*)vs11;
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if(ver->type == 0xFFFE)
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{
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printf("vs_%d_%d\n\n",ver->major,ver->minor);
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if( parse_vs(vs11+1) )
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translate_vs(vs11+1);
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};
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return 0;
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};
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static char txt_swzl[4] = {'x','y','z','w'};
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static char *txt_mod[2] = { "","_sat"};
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int parse_vs(const u32_t *stream)
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{
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dst_t *dst;
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src_t *src;
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u32_t swzl;
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u32_t wr;
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char szswzl[5];
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char szwm[5];
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int i,j;
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while(1)
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{
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op_type_t instr = *stream++ & 0xFFFF;
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switch( instr )
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{
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case D3DSIO_MOV:
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dst = (dst_t*)stream++;
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src = (src_t*)stream++;
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swzl = src->swzl;
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wr = dst->wr;
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for(i=0,j=0; i < 4; i++)
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{
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szswzl[i] = txt_swzl[swzl&3];
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swzl>>=2;
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if(wr & (1<<i))
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szwm[j++] = txt_swzl[i];
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};
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szswzl[4] = 0;
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szwm[j] = 0;
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switch(dst->typel)
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{
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case 4: // Rasterizer Register File
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if(dst->ind == 0)
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vs_out_written |= (1 << VS_OUT_POS);
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else if (dst->ind == 1)
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vs_out_written |= (1 << VS_OUT_FOG);
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else if (dst->ind == 2)
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vs_out_written |= (1 << VS_OUT_PSIZE);
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else
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printf("invalid raster register %d",dst->ind);
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break;
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case 5: // Attribute Output Register File
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if(dst->ind == 0)
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vs_out_written |= (1 << VS_OUT_COL0);
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else if (dst->ind == 1)
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vs_out_written |= (1 << VS_OUT_COL1);
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else
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printf("invalid attribute register %d",dst->ind);
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break;
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case 6: // Texture Coordinate Output Register File
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if(dst->ind < 8)
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vs_out_written |= (1 << (VS_OUT_TEX0+dst->ind));
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else
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printf("invalid texture register %d",dst->ind);
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};
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printf("%s%s %s%d.%s,\t %s%d.%s\n",sz_vs_command[instr],txt_mod[dst->mod],
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sztype[dst->typel],dst->ind,szwm,
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sztype[src->typel],src->ind,szswzl);
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break;
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case D3DSIO_DCL:
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parse_dcl(stream);
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stream+=2;
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break;
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case 0xFFFF:
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return 1;
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default:
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return 0;
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};
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};
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};
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int parse_dcl(const u32_t *stream)
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{
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usage_t *usage;
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dst_t *dst;
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int dsttype;
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char szwm[5];
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int i;
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u32_t wr;
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usage = (usage_t*)stream++;
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dst = (dst_t*)stream++;
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dsttype = (dst->typeh << 4) | dst->typel;
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wr = dst->wr;
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for(i=0; wr; i++, wr>>=1)
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{
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if(wr & 1)
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szwm[i] = txt_swzl[i];
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};
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szwm[i] = 0;
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printf("dcl_%s%d \t\t %s%d.%s\n",szusage[usage->type],usage->ind,
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sztype[dsttype],dst->ind, szwm);
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return 2;
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}
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int translate_dcl(const u32_t *stream);
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int translate_mov(const u32_t *stream);
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int translate_vs(const u32_t *stream)
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{
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assign_outputs();
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while(1)
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{
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op_type_t instr = *stream++ & 0xFFFF;
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switch( instr )
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{
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case D3DSIO_MOV:
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translate_mov(stream);
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stream+=2;
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break;
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case D3DSIO_DCL:
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translate_dcl(stream);
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stream+=2;
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break;
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case 0xFFFF:
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return 1;
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default:
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return 0;
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};
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};
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};
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int translate_dcl(const u32_t *stream)
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{
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return 1;
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};
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u32_t inst[4];
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#include "r300_vertprog.h"
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/**
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* Swizzle indexes.
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* Do not change!
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*/
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/*@{*/
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#define SWIZZLE_X 0
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#define SWIZZLE_Y 1
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#define SWIZZLE_Z 2
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#define SWIZZLE_W 3
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#define SWIZZLE_ZERO 4 /**< For SWZ instruction only */
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#define SWIZZLE_ONE 5 /**< For SWZ instruction only */
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#define SWIZZLE_NIL 7 /**< used during shader code gen (undefined value) */
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/*@}*/
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#define __CONST(x, y) \
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(PVS_SRC_OPERAND(t_src_index(vp, &src[x]), \
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t_swizzle(y), \
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t_swizzle(y), \
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t_swizzle(y), \
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t_swizzle(y), \
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t_src_class(src[x].File), \
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VSF_FLAG_NONE) | (src[x].RelAddr << 4))
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static unsigned long t_swizzle(u32_t swizzle)
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{
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/* this is in fact a NOP as the Mesa SWIZZLE_* are all identical to VSF_IN_COMPONENT_* */
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return swizzle;
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}
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static unsigned long t_dst_mask(u32_t mask)
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{
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/* WRITEMASK_* is equivalent to VSF_FLAG_* */
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return mask & VSF_FLAG_ALL;
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}
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static unsigned long t_dst_class(int file)
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{
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switch (file) {
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case 0: //D3DSPR_TEMP
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return PVS_DST_REG_TEMPORARY;
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case 3: //D3DSPR_ADDR
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return PVS_DST_REG_A0;
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case 4: //D3DSPR_RASTOUT
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case 5:
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case 6: //D3DSPR_TEXCRDOUT
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return PVS_DST_REG_OUT;
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/*
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case PROGRAM_INPUT:
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case PROGRAM_LOCAL_PARAM:
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case PROGRAM_ENV_PARAM:
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case PROGRAM_NAMED_PARAM:
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case PROGRAM_STATE_VAR:
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case PROGRAM_WRITE_ONLY:
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case PROGRAM_ADDRESS:
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*/
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default:
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printf("problem in %s", __FUNCTION__);
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return -1;
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}
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}
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static unsigned long t_dst_index(dst_t *dst)
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{
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switch(dst->typel)
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{
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case 4:
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if(dst->ind == 0)
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return vs_outputs[VS_OUT_POS];
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else if (dst->ind == 1)
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return vs_outputs[VS_OUT_FOG];
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else if (dst->ind == 2)
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return vs_outputs[VS_OUT_PSIZE];
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break;
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case 5:
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if(dst->ind == 0)
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return vs_outputs[VS_OUT_COL0];
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else if (dst->ind == 1)
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return vs_outputs[VS_OUT_COL1];
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case 6:
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return vs_outputs[VS_OUT_TEX0+dst->ind];
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default:
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return dst->ind;
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}
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}
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static void assign_outputs()
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{
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int i;
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int cur_reg = 0;
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for (i = 0; i < 16; i++)
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vs_outputs[i] = -1;
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// assert(vs_out_written & (1 << VS_OUT_POS));
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if (vs_out_written & (1 << VS_OUT_POS)) {
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vs_outputs[VS_OUT_POS] = cur_reg++;
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}
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if (vs_out_written & (1 << VS_OUT_PSIZE)) {
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vs_outputs[VS_OUT_PSIZE] = cur_reg++;
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}
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if (vs_out_written & (1 << VS_OUT_COL0)) {
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vs_outputs[VS_OUT_COL0] = cur_reg++;
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}
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if (vs_out_written & (1 << VS_OUT_COL1)) {
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vs_outputs[VS_OUT_COL1] = vs_outputs[VS_OUT_COL0] + 1; // ???
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cur_reg = vs_outputs[VS_OUT_COL1] + 1;
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}
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#if 0
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if (vp->key.OutputsWritten & (1 << VERT_RESULT_FOGC)) { //fog must be in
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vp->outputs[VERT_RESULT_FOGC] = cur_reg++; //one of the color regs
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}
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#endif
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for (i = VS_OUT_TEX0; i <= VS_OUT_TEX7; i++) {
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if (vs_out_written & (1 << i)) {
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vs_outputs[i] = cur_reg++;
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}
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}
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}
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int translate_mov(const u32_t *stream)
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{
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dst_t *dst = (dst_t*)stream++;
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src_t *src = (src_t*)stream++;
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int swzl = src->swzl;
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int wr = dst->wr;
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inst[0] = PVS_OP_DST_OPERAND(VE_ADD,
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0,
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0,
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t_dst_index(dst),
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(dst->wr),
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t_dst_class(dst->typel));
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//inst[1] = t_src(vp, &src[0]);
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// inst[2] = __CONST(0, SWIZZLE_ZERO);
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//inst[3] = __CONST(0, SWIZZLE_ZERO);
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printf("inst_0 %x\n", inst[0]);
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return 1;
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}
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/*
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static GLuint *r300TranslateOpcodeMOV(struct r300_vertex_program *vp,
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struct prog_instruction *vpi,
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GLuint * inst,
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struct prog_src_register src[3])
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{
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//ADD RESULT 1.X Y Z W PARAM 0{} {X Y Z W} PARAM 0{} {ZERO ZERO ZERO ZERO}
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inst[0] = PVS_OP_DST_OPERAND(VE_ADD,
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GL_FALSE,
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GL_FALSE,
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t_dst_index(vp, &vpi->DstReg),
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t_dst_mask(vpi->DstReg.WriteMask),
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t_dst_class(vpi->DstReg.File));
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inst[1] = t_src(vp, &src[0]);
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inst[2] = __CONST(0, SWIZZLE_ZERO);
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inst[3] = __CONST(0, SWIZZLE_ZERO);
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return inst;
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}
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*/
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