user MMIO functions added
git-svn-id: svn://kolibrios.org@1348 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Artem Jerdev (art_zh)
parent
027fb9ed41
commit
5fd05e076d
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@ -35,50 +35,58 @@ align 4
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pci_api:
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cmp [pci_access_enabled],1
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jne no_pci_access_for_applications
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cmp [pci_access_enabled],1
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jne no_pci_access_for_applications
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or al,al
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jnz pci_fn_1
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; PCI function 0: get pci version (AH.AL)
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movzx eax,word [BOOT_VAR+0x9022]
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ret
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or al,al
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jnz pci_fn_1
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; PCI function 0: get pci version (AH.AL)
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movzx eax,word [BOOT_VAR+0x9022]
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ret
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pci_fn_1:
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cmp al,1
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jnz pci_fn_2
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cmp al,1
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jnz pci_fn_2
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; PCI function 1: get last bus in AL
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mov al,[BOOT_VAR+0x9021]
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ret
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; PCI function 1: get last bus in AL
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mov al,[BOOT_VAR+0x9021]
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ret
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pci_fn_2:
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cmp al,2
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jne pci_fn_3
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; PCI function 2: get pci access mechanism
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mov al,[BOOT_VAR+0x9020]
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ret
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cmp al,2
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jne pci_fn_3
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; PCI function 2: get pci access mechanism
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mov al,[BOOT_VAR+0x9020]
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ret
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pci_fn_3:
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cmp al,4
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jz pci_read_reg ;byte
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cmp al,5
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jz pci_read_reg ;word
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cmp al,6
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jz pci_read_reg ;dword
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cmp al,4
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jz pci_read_reg ;byte
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cmp al,5
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jz pci_read_reg ;word
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cmp al,6
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jz pci_read_reg ;dword
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cmp al,8
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jz pci_write_reg ;byte
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cmp al,9
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jz pci_write_reg ;word
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cmp al,10
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jz pci_write_reg ;dword
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cmp al,11 ; <<< user-level MMIO functions <<< NEW!
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jz pci_mmio_init
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cmp al,12
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jz pci_mmio_map
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cmp al,13
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jz pci_mmio_unmap
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cmp al,8
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jz pci_write_reg ;byte
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cmp al,9
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jz pci_write_reg ;word
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cmp al,10
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jz pci_write_reg ;dword
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no_pci_access_for_applications:
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mov eax,-1
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mov eax,-1
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ret
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ret
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;***************************************************************************
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; Function
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@ -96,10 +104,10 @@ pci_fn_3:
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align 4
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pci_make_config_cmd:
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shl eax,8 ; move bus to bits 16-23
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mov ax,bx ; combine all
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shl eax,8 ; move bus to bits 16-23
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mov ax,bx ; combine all
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and eax,0xffffff
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or eax,0x80000000
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or eax,0x80000000
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ret
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;***************************************************************************
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@ -116,120 +124,120 @@ pci_make_config_cmd:
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align 4
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pci_read_reg:
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cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
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je pci_read_reg_2
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cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
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je pci_read_reg_2
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; mechanism 1
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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; mechanism 1
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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call pci_make_config_cmd
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mov ebx,eax
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; get current state
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mov dx,0xcf8
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in eax, dx
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push eax
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; set up addressing to config data
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mov eax,ebx
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and al,0xfc ; make address dword-aligned
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out dx,eax
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; get requested DWORD of config data
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mov dl,0xfc
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and bl,3
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or dl,bl ; add to port address first 2 bits of register address
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call pci_make_config_cmd
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mov ebx,eax
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; get current state
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mov dx,0xcf8
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in eax, dx
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push eax
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; set up addressing to config data
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mov eax,ebx
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and al,0xfc ; make address dword-aligned
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out dx,eax
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; get requested DWORD of config data
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mov dl,0xfc
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and bl,3
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or dl,bl ; add to port address first 2 bits of register address
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or esi,esi
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jz pci_read_byte1
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cmp esi,1
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jz pci_read_word1
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cmp esi,2
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jz pci_read_dword1
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jmp pci_fin_read1
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or esi,esi
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jz pci_read_byte1
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cmp esi,1
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jz pci_read_word1
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cmp esi,2
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jz pci_read_dword1
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jmp pci_fin_read1
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pci_read_byte1:
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in al,dx
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jmp pci_fin_read1
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in al,dx
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jmp pci_fin_read1
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pci_read_word1:
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in ax,dx
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jmp pci_fin_read1
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in ax,dx
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jmp pci_fin_read1
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pci_read_dword1:
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in eax,dx
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jmp pci_fin_read1
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in eax,dx
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jmp pci_fin_read1
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pci_fin_read1:
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; restore configuration control
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xchg eax,[esp]
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mov dx,0xcf8
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out dx,eax
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; restore configuration control
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xchg eax,[esp]
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mov dx,0xcf8
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out dx,eax
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pop eax
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pop esi
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ret
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pop eax
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pop esi
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ret
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pci_read_reg_2:
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test bh,128 ;mech#2 only supports 16 devices per bus
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jnz pci_read_reg_err
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test bh,128 ;mech#2 only supports 16 devices per bus
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jnz pci_read_reg_err
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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push eax
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;store current state of config space
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mov dx,0xcf8
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in al,dx
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mov ah,al
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mov dl,0xfa
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in al,dx
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push eax
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;store current state of config space
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mov dx,0xcf8
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in al,dx
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mov ah,al
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mov dl,0xfa
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in al,dx
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xchg eax,[esp]
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; out 0xcfa,bus
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mov al,ah
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out dx,al
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; out 0xcf8,0x80
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mov dl,0xf8
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mov al,0x80
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out dx,al
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; compute addr
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shr bh,3 ; func is ignored in mechanism 2
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or bh,0xc0
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mov dx,bx
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xchg eax,[esp]
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; out 0xcfa,bus
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mov al,ah
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out dx,al
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; out 0xcf8,0x80
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mov dl,0xf8
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mov al,0x80
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out dx,al
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; compute addr
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shr bh,3 ; func is ignored in mechanism 2
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or bh,0xc0
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mov dx,bx
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or esi,esi
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jz pci_read_byte2
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cmp esi,1
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jz pci_read_word2
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cmp esi,2
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jz pci_read_dword2
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jmp pci_fin_read2
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or esi,esi
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jz pci_read_byte2
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cmp esi,1
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jz pci_read_word2
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cmp esi,2
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jz pci_read_dword2
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jmp pci_fin_read2
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pci_read_byte2:
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in al,dx
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jmp pci_fin_read2
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in al,dx
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jmp pci_fin_read2
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pci_read_word2:
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in ax,dx
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jmp pci_fin_read2
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in ax,dx
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jmp pci_fin_read2
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pci_read_dword2:
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in eax,dx
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in eax,dx
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; jmp pci_fin_read2
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pci_fin_read2:
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; restore configuration space
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xchg eax,[esp]
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mov dx,0xcfa
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out dx,al
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mov dl,0xf8
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mov al,ah
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out dx,al
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; restore configuration space
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xchg eax,[esp]
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mov dx,0xcfa
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out dx,al
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mov dl,0xf8
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mov al,ah
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out dx,al
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pop eax
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pop esi
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ret
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pop eax
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pop esi
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ret
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pci_read_reg_err:
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xor eax,eax
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dec eax
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ret
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xor eax,eax
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dec eax
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ret
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;***************************************************************************
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@ -247,124 +255,257 @@ pci_read_reg_err:
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align 4
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pci_write_reg:
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cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
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je pci_write_reg_2
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cmp byte [BOOT_VAR+0x9020],2 ;what mechanism will we use?
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je pci_write_reg_2
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; mechanism 1
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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; mechanism 1
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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call pci_make_config_cmd
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mov ebx,eax
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; get current state into ecx
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mov dx,0xcf8
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in eax, dx
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push eax
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; set up addressing to config data
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mov eax,ebx
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and al,0xfc ; make address dword-aligned
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out dx,eax
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; write DWORD of config data
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mov dl,0xfc
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and bl,3
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or dl,bl
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mov eax,ecx
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call pci_make_config_cmd
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mov ebx,eax
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; get current state into ecx
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mov dx,0xcf8
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in eax, dx
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push eax
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; set up addressing to config data
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mov eax,ebx
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and al,0xfc ; make address dword-aligned
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out dx,eax
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; write DWORD of config data
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mov dl,0xfc
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and bl,3
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or dl,bl
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mov eax,ecx
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or esi,esi
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jz pci_write_byte1
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cmp esi,1
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jz pci_write_word1
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cmp esi,2
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jz pci_write_dword1
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jmp pci_fin_write1
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or esi,esi
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jz pci_write_byte1
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cmp esi,1
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jz pci_write_word1
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cmp esi,2
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jz pci_write_dword1
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jmp pci_fin_write1
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pci_write_byte1:
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out dx,al
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jmp pci_fin_write1
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out dx,al
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jmp pci_fin_write1
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pci_write_word1:
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out dx,ax
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jmp pci_fin_write1
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out dx,ax
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jmp pci_fin_write1
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pci_write_dword1:
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out dx,eax
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jmp pci_fin_write1
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out dx,eax
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jmp pci_fin_write1
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pci_fin_write1:
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; restore configuration control
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pop eax
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mov dl,0xf8
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out dx,eax
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; restore configuration control
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pop eax
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mov dl,0xf8
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out dx,eax
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xor eax,eax
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pop esi
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xor eax,eax
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pop esi
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ret
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ret
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pci_write_reg_2:
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test bh,128 ;mech#2 only supports 16 devices per bus
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jnz pci_write_reg_err
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test bh,128 ;mech#2 only supports 16 devices per bus
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jnz pci_write_reg_err
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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push eax
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;store current state of config space
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mov dx,0xcf8
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in al,dx
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mov ah,al
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mov dl,0xfa
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in al,dx
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xchg eax,[esp]
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; out 0xcfa,bus
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mov al,ah
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out dx,al
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; out 0xcf8,0x80
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mov dl,0xf8
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mov al,0x80
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out dx,al
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; compute addr
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shr bh,3 ; func is ignored in mechanism 2
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or bh,0xc0
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mov dx,bx
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; write register
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mov eax,ecx
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push eax
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;store current state of config space
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mov dx,0xcf8
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in al,dx
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mov ah,al
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mov dl,0xfa
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in al,dx
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xchg eax,[esp]
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; out 0xcfa,bus
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mov al,ah
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out dx,al
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; out 0xcf8,0x80
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mov dl,0xf8
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mov al,0x80
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out dx,al
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; compute addr
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shr bh,3 ; func is ignored in mechanism 2
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or bh,0xc0
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mov dx,bx
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; write register
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mov eax,ecx
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or esi,esi
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jz pci_write_byte2
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cmp esi,1
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jz pci_write_word2
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cmp esi,2
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jz pci_write_dword2
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jmp pci_fin_write2
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or esi,esi
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jz pci_write_byte2
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cmp esi,1
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jz pci_write_word2
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cmp esi,2
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jz pci_write_dword2
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jmp pci_fin_write2
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pci_write_byte2:
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out dx,al
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jmp pci_fin_write2
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out dx,al
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jmp pci_fin_write2
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pci_write_word2:
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out dx,ax
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jmp pci_fin_write2
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out dx,ax
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jmp pci_fin_write2
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pci_write_dword2:
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out dx,eax
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jmp pci_fin_write2
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out dx,eax
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jmp pci_fin_write2
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pci_fin_write2:
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; restore configuration space
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pop eax
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mov dx,0xcfa
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out dx,al
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mov dl,0xf8
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mov al,ah
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out dx,al
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; restore configuration space
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pop eax
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mov dx,0xcfa
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out dx,al
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mov dl,0xf8
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mov al,ah
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out dx,al
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xor eax,eax
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pop esi
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ret
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xor eax,eax
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pop esi
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ret
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pci_write_reg_err:
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xor eax,eax
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dec eax
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ret
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xor eax,eax
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dec eax
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ret
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;***************************************************************************
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; Function
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; pci_mmio_init ; NEW!
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;
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; Description
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; IN: bx = device's PCI bus address (bbbbbbbbdddddfff)
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; returns ax = user heap space available (bytes)
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; Error codes
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; eax = -1 : PCI user access blocked,
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; eax = -2 : device not registered for uMMIO service
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; eax = -3 : user heap initialization failure
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;***************************************************************************
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align 4
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pci_mmio_init:
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cmp bx, word [mmio_pci_addr] ; must be set in kernel/data32.inc
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jz @f
|
||||
mov eax,-2
|
||||
ret
|
||||
@@:
|
||||
call init_heap ; (if not initialized yet)
|
||||
or eax,eax
|
||||
jz @f
|
||||
ret
|
||||
@@:
|
||||
mov eax,-3
|
||||
ret
|
||||
|
||||
|
||||
;***************************************************************************
|
||||
; Function
|
||||
; pci_mmio_map ; NEW!
|
||||
;
|
||||
; Description
|
||||
; maps a block of PCI memory to user-accessible linear address
|
||||
;
|
||||
; WARNING! This VERY EXPERIMENTAL service is for one chosen PCI device only!
|
||||
; The target device address should be set in kernel var mmio_pci_addr
|
||||
;
|
||||
; IN: ah = BAR#;
|
||||
; IN: ebx = block size (bytes);
|
||||
; IN: ecx = offset in MMIO block (in 4K-pages, to avoid misaligned pages);
|
||||
;
|
||||
; Returns eax = MMIO block's linear address in the userspace (if no error)
|
||||
;
|
||||
;
|
||||
; Error codes
|
||||
; eax = -1 : user access to PCI blocked,
|
||||
; eax = -2 : an invalid BAR register referred
|
||||
; eax = -3 : no i/o space on that BAR
|
||||
; eax = -4 : a port i/o BAR register referred
|
||||
; eax = -5 : dynamic userspace allocation problem
|
||||
;***************************************************************************
|
||||
|
||||
align 4
|
||||
pci_mmio_map:
|
||||
and edx,0x0ffff
|
||||
cmp ah,6
|
||||
jc @f
|
||||
mov eax,-2
|
||||
ret
|
||||
@@:
|
||||
push ecx
|
||||
add ebx, 4095
|
||||
and ebx,-4096
|
||||
push ebx
|
||||
mov bl, ah ; bl = BAR# (0..5)
|
||||
shl bl, 1
|
||||
shl bl, 1
|
||||
add bl, 0x10 ; bl = BARs offset in PCI config. space
|
||||
mov ax,word [mmio_pci_addr]
|
||||
mov bh, al ; bh = dddddfff
|
||||
mov al, 2 ; al : DW to read
|
||||
call pci_read_reg
|
||||
or eax, eax
|
||||
jnz @f
|
||||
mov eax,-3 ; empty I/O space
|
||||
jmp mmio_ret_fail
|
||||
@@:
|
||||
test eax, 1
|
||||
jz @f
|
||||
mov eax,-4 ; damned ports (not MMIO space)
|
||||
jmp mmio_ret_fail
|
||||
@@:
|
||||
pop ecx ; ecx = block size, bytes (expanded to whole page)
|
||||
mov ebx, ecx ; user_alloc destroys eax, ecx, edx, but saves ebx
|
||||
push eax ; store MMIO physical address + keep 2DWords in the stack
|
||||
stdcall user_alloc, ecx
|
||||
or eax, eax
|
||||
jnz mmio_map_over
|
||||
mov eax,-5 ; problem with page allocation
|
||||
|
||||
mmio_ret_fail:
|
||||
pop ecx
|
||||
pop edx
|
||||
ret
|
||||
|
||||
mmio_map_over:
|
||||
mov ecx, ebx ; ecx = size (bytes, expanded to whole page)
|
||||
shr ecx, 12 ; ecx = number of pages
|
||||
mov ebx, eax ; ebx = linear address
|
||||
pop eax ; eax = MMIO start
|
||||
pop edx ; edx = MMIO shift (pages)
|
||||
shl edx, 12 ; edx = MMIO shift (bytes)
|
||||
add eax, edx ; eax = uMMIO physical address
|
||||
or eax, PG_SHARED
|
||||
or eax, PG_UW
|
||||
or eax, PG_NOCACHE
|
||||
mov edi, ebx
|
||||
call commit_pages
|
||||
mov eax, edi
|
||||
ret
|
||||
|
||||
;***************************************************************************
|
||||
; Function
|
||||
; pci_mmio_unmap_page ; NEW!
|
||||
;
|
||||
; Description
|
||||
; unmaps the linear space previously tied to a PCI memory block
|
||||
;
|
||||
; IN: ebx = linear address of space previously allocated by pci_mmio_map
|
||||
; returns eax = 1 if successfully unmapped
|
||||
;
|
||||
; Error codes
|
||||
; eax = -1 if no user PCI access allowed,
|
||||
; eax = 0 if unmapping failed
|
||||
;***************************************************************************
|
||||
|
||||
align 4
|
||||
pci_mmio_unmap:
|
||||
stdcall user_free, ebx
|
||||
ret
|
||||
|
||||
|
||||
;-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
|
||||
|
||||
|
|
@ -378,19 +519,19 @@ sys_pcibios:
|
|||
xchg ecx, eax
|
||||
xchg edx, eax
|
||||
xchg esi, eax
|
||||
xchg edi, eax
|
||||
xchg edi, eax
|
||||
cmp [pci_access_enabled], 1
|
||||
jne .unsupported_func
|
||||
cmp [pci_bios_entry], 0
|
||||
jne .unsupported_func
|
||||
cmp [pci_bios_entry], 0
|
||||
jz .emulate_bios
|
||||
|
||||
push ds
|
||||
mov ax, pci_data_sel
|
||||
mov ds, ax
|
||||
mov eax, ebp
|
||||
mov ah, 0B1h
|
||||
call pword [cs:pci_bios_entry]
|
||||
pop ds
|
||||
push ds
|
||||
mov ax, pci_data_sel
|
||||
mov ds, ax
|
||||
mov eax, ebp
|
||||
mov ah, 0B1h
|
||||
call pword [cs:pci_bios_entry]
|
||||
pop ds
|
||||
|
||||
jmp .return
|
||||
;-=-=-=-=-=-=-=-=
|
||||
|
|
@ -398,10 +539,10 @@ sys_pcibios:
|
|||
cmp ebp, 1 ; PCI_FUNCTION_ID
|
||||
jnz .not_PCI_BIOS_PRESENT
|
||||
mov edx, 'PCI '
|
||||
mov al, [OS_BASE+0x2F0000 + 0x9020]
|
||||
mov bx, [OS_BASE+0x2F0000 + 0x9022]
|
||||
mov cl, [OS_BASE+0x2F0000 + 0x9021]
|
||||
xor ah, ah
|
||||
mov al, [OS_BASE+0x2F0000 + 0x9020]
|
||||
mov bx, [OS_BASE+0x2F0000 + 0x9022]
|
||||
mov cl, [OS_BASE+0x2F0000 + 0x9021]
|
||||
xor ah, ah
|
||||
jmp .return_abcd
|
||||
|
||||
.not_PCI_BIOS_PRESENT:
|
||||
|
|
@ -415,7 +556,7 @@ sys_pcibios:
|
|||
dec si
|
||||
jns ..no
|
||||
mov bx, [ebx + 4]
|
||||
xor ah, ah
|
||||
xor ah, ah
|
||||
jmp .return_ab
|
||||
..no: cmp word[ebx], 0
|
||||
je ..dev_not_found
|
||||
|
|
@ -430,10 +571,10 @@ sys_pcibios:
|
|||
jne .not_FIND_PCI_CLASS_CODE
|
||||
mov esi, pci_emu_dat
|
||||
shl ecx, 8
|
||||
..nxt2: cmp [esi], ecx
|
||||
..nxt2: cmp [esi], ecx
|
||||
jne ..no2
|
||||
mov bx, [esi]
|
||||
xor ah, ah
|
||||
xor ah, ah
|
||||
jmp .return_ab
|
||||
..no2: cmp dword[esi], 0
|
||||
je ..dev_not_found
|
||||
|
|
@ -445,11 +586,11 @@ sys_pcibios:
|
|||
jb .not_READ_CONFIG
|
||||
cmp ebp, 0x0A
|
||||
ja .not_READ_CONFIG
|
||||
mov eax, ebp
|
||||
mov ah, bh
|
||||
mov edx, edi
|
||||
mov bh, bl
|
||||
mov bl, dl
|
||||
mov eax, ebp
|
||||
mov ah, bh
|
||||
mov edx, edi
|
||||
mov bh, bl
|
||||
mov bl, dl
|
||||
call pci_read_reg
|
||||
mov ecx, eax
|
||||
xor ah, ah ; SUCCESSFUL
|
||||
|
|
@ -459,11 +600,11 @@ sys_pcibios:
|
|||
jb .not_WRITE_CONFIG
|
||||
cmp ebp, 0x0D
|
||||
ja .not_WRITE_CONFIG
|
||||
lea eax, [ebp+1]
|
||||
mov ah, bh
|
||||
mov edx, edi
|
||||
mov bh, bl
|
||||
mov bl, dl
|
||||
lea eax, [ebp+1]
|
||||
mov ah, bh
|
||||
mov edx, edi
|
||||
mov bh, bl
|
||||
mov bl, dl
|
||||
call pci_write_reg
|
||||
xor ah, ah ; SUCCESSFUL
|
||||
jmp .return_abc
|
||||
|
|
|
|||
Loading…
Reference in New Issue