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intel-2D: sna gen2-gen7 vsync
git-svn-id: svn://kolibrios.org@4375 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Sergey Semyonov (Serge)
parent
4a209e9d17
commit
3f96e2dfdf
@ -43,6 +43,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
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#include "compiler.h"
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#include "sna.h"
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#include "sna_reg.h"
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#include <pixlib2.h>
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#include <kos32sys.h>
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@ -421,6 +422,139 @@ typedef struct
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#define MI_LOAD_REGISTER_IMM (0x22<<23)
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#define MI_WAIT_FOR_EVENT (0x03<<23)
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static bool sna_emit_wait_for_scanline_hsw(struct sna *sna,
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rect_t *crtc,
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int pipe, int y1, int y2,
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bool full_height)
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{
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uint32_t event;
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uint32_t *b;
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if (!sna->kgem.has_secure_batches)
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return false;
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b = kgem_get_batch(&sna->kgem);
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sna->kgem.nbatch += 17;
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switch (pipe) {
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default: assert(0);
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case 0: event = 1 << 0; break;
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case 1: event = 1 << 8; break;
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case 2: event = 1 << 14; break;
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}
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b[0] = MI_LOAD_REGISTER_IMM | 1;
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b[1] = 0x44050; /* DERRMR */
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b[2] = ~event;
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b[3] = MI_LOAD_REGISTER_IMM | 1;
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b[4] = 0xa188; /* FORCEWAKE_MT */
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b[5] = 2 << 16 | 2;
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/* The documentation says that the LOAD_SCAN_LINES command
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* always comes in pairs. Don't ask me why. */
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switch (pipe) {
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default: assert(0);
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case 0: event = 0 << 19; break;
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case 1: event = 1 << 19; break;
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case 2: event = 4 << 19; break;
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}
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b[8] = b[6] = MI_LOAD_SCAN_LINES_INCL | event;
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b[9] = b[7] = (y1 << 16) | (y2-1);
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switch (pipe) {
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default: assert(0);
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case 0: event = 1 << 0; break;
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case 1: event = 1 << 8; break;
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case 2: event = 1 << 14; break;
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}
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b[10] = MI_WAIT_FOR_EVENT | event;
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b[11] = MI_LOAD_REGISTER_IMM | 1;
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b[12] = 0xa188; /* FORCEWAKE_MT */
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b[13] = 2 << 16;
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b[14] = MI_LOAD_REGISTER_IMM | 1;
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b[15] = 0x44050; /* DERRMR */
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b[16] = ~0;
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sna->kgem.batch_flags |= I915_EXEC_SECURE;
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return true;
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}
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static bool sna_emit_wait_for_scanline_ivb(struct sna *sna,
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rect_t *crtc,
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int pipe, int y1, int y2,
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bool full_height)
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{
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uint32_t *b;
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uint32_t event;
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uint32_t forcewake;
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if (!sna->kgem.has_secure_batches)
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return false;
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assert(y1 >= 0);
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assert(y2 > y1);
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assert(sna->kgem.mode);
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/* Always program one less than the desired value */
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if (--y1 < 0)
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y1 = crtc->b;
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y2--;
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switch (pipe) {
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default:
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assert(0);
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case 0:
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event = 1 << (full_height ? 3 : 0);
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break;
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case 1:
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event = 1 << (full_height ? 11 : 8);
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break;
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case 2:
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event = 1 << (full_height ? 21 : 14);
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break;
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}
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if (sna->kgem.gen == 071)
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forcewake = 0x1300b0; /* FORCEWAKE_VLV */
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else
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forcewake = 0xa188; /* FORCEWAKE_MT */
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b = kgem_get_batch(&sna->kgem);
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/* Both the LRI and WAIT_FOR_EVENT must be in the same cacheline */
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if (((sna->kgem.nbatch + 6) >> 4) != (sna->kgem.nbatch + 10) >> 4) {
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int dw = sna->kgem.nbatch + 6;
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dw = ALIGN(dw, 16) - dw;
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while (dw--)
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*b++ = MI_NOOP;
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}
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b[0] = MI_LOAD_REGISTER_IMM | 1;
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b[1] = 0x44050; /* DERRMR */
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b[2] = ~event;
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b[3] = MI_LOAD_REGISTER_IMM | 1;
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b[4] = forcewake;
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b[5] = 2 << 16 | 2;
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b[6] = MI_LOAD_REGISTER_IMM | 1;
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b[7] = 0x70068 + 0x1000 * pipe;
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b[8] = (1 << 31) | (1 << 30) | (y1 << 16) | y2;
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b[9] = MI_WAIT_FOR_EVENT | event;
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b[10] = MI_LOAD_REGISTER_IMM | 1;
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b[11] = forcewake;
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b[12] = 2 << 16;
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b[13] = MI_LOAD_REGISTER_IMM | 1;
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b[14] = 0x44050; /* DERRMR */
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b[15] = ~0;
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sna->kgem.nbatch = b - sna->kgem.batch + 16;
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sna->kgem.batch_flags |= I915_EXEC_SECURE;
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return true;
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}
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static bool sna_emit_wait_for_scanline_gen6(struct sna *sna,
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rect_t *crtc,
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int pipe, int y1, int y2,
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@ -468,6 +602,65 @@ static bool sna_emit_wait_for_scanline_gen6(struct sna *sna,
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return true;
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}
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static bool sna_emit_wait_for_scanline_gen4(struct sna *sna,
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rect_t *crtc,
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int pipe, int y1, int y2,
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bool full_height)
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{
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uint32_t event;
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uint32_t *b;
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if (pipe == 0) {
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if (full_height)
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event = MI_WAIT_FOR_PIPEA_SVBLANK;
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else
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event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW;
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} else {
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if (full_height)
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event = MI_WAIT_FOR_PIPEB_SVBLANK;
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else
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event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
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}
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b = kgem_get_batch(&sna->kgem);
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sna->kgem.nbatch += 5;
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/* The documentation says that the LOAD_SCAN_LINES command
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* always comes in pairs. Don't ask me why. */
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b[2] = b[0] = MI_LOAD_SCAN_LINES_INCL | pipe << 20;
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b[3] = b[1] = (y1 << 16) | (y2-1);
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b[4] = MI_WAIT_FOR_EVENT | event;
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return true;
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}
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static bool sna_emit_wait_for_scanline_gen2(struct sna *sna,
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rect_t *crtc,
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int pipe, int y1, int y2,
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bool full_height)
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{
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uint32_t *b;
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/*
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* Pre-965 doesn't have SVBLANK, so we need a bit
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* of extra time for the blitter to start up and
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* do its job for a full height blit
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*/
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if (full_height)
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y2 -= 2;
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b = kgem_get_batch(&sna->kgem);
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sna->kgem.nbatch += 5;
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/* The documentation says that the LOAD_SCAN_LINES command
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* always comes in pairs. Don't ask me why. */
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b[2] = b[0] = MI_LOAD_SCAN_LINES_INCL | pipe << 20;
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b[3] = b[1] = (y1 << 16) | (y2-1);
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b[4] = MI_WAIT_FOR_EVENT | 1 << (1 + 4*pipe);
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return true;
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}
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bool
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sna_wait_for_scanline(struct sna *sna,
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rect_t *crtc,
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@ -504,14 +697,16 @@ sna_wait_for_scanline(struct sna *sna,
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if (sna->kgem.gen >= 0100)
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ret = false;
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// else if (sna->kgem.gen >= 075)
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// ret = sna_emit_wait_for_scanline_hsw(sna, crtc, pipe, y1, y2, full_height);
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// else if (sna->kgem.gen >= 070)
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// ret = sna_emit_wait_for_scanline_ivb(sna, crtc, pipe, y1, y2, full_height);
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else if (sna->kgem.gen >= 075)
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ret = sna_emit_wait_for_scanline_hsw(sna, crtc, pipe, y1, y2, full_height);
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else if (sna->kgem.gen >= 070)
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ret = sna_emit_wait_for_scanline_ivb(sna, crtc, pipe, y1, y2, full_height);
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else if (sna->kgem.gen >= 060)
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ret =sna_emit_wait_for_scanline_gen6(sna, crtc, pipe, y1, y2, full_height);
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// else if (sna->kgem.gen >= 040)
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// ret = sna_emit_wait_for_scanline_gen4(sna, crtc, pipe, y1, y2, full_height);
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else if (sna->kgem.gen >= 040)
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ret = sna_emit_wait_for_scanline_gen4(sna, crtc, pipe, y1, y2, full_height);
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else
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ret = sna_emit_wait_for_scanline_gen2(sna, crtc, pipe, y1, y2, full_height);
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return ret;
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}
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@ -970,7 +1165,7 @@ int sna_blit_tex(bitmap_t *bitmap, bool scale, int dst_x, int dst_y,
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__lock_acquire_recursive(__sna_lock);
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#if 1
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#if 0
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{
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rect_t crtc, clip;
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