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sync with main kernel: rotationless sysfn62 call
git-svn-id: svn://kolibrios.org@1687 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Artem Jerdev (art_zh)
parent
31b1595dc8
commit
309387e070
@ -8,6 +8,7 @@
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;; ;;
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;; 32 bit PCI driver code ;;
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;; ;;
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;; Version 0.4A November 4th, 2010 ;;
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;; Version 0.4 February 2nd, 2010 ;;
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;; Version 0.3 April 9, 2007 ;;
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;; Version 0.2 December 21st, 2002 ;;
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@ -32,81 +33,87 @@ $Revision$
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; Description
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; entry point for system PCI calls
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;***************************************************************************
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mmio_pci_addr dw 0x400 ; default PCI device bdf-address
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align 4
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mmio_pci_addr dw 0x100 ; default PCI device bdf-address
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dw 0
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iglobal
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align 4
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f62call:
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dd pci_fn_0
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dd pci_fn_1
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dd pci_fn_2
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dd pci_service_not_supported ;3
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dd pci_read_reg ;4 byte
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dd pci_read_reg ;5 word
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dd pci_read_reg ;6 dword
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dd pci_service_not_supported ;7
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dd pci_write_reg ;8 byte
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dd pci_write_reg ;9 word
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dd pci_write_reg ;10 dword
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dd pci_mmio_init ;11
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dd pci_mmio_map ;12
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dd pci_mmio_unmap ;13
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endg
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align 4
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pci_api:
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;cross
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mov eax, ebx
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mov ebx, ecx
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mov ecx, edx
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cmp [pci_access_enabled],1
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jne no_pci_access_for_applications
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jne pci_service_not_supported
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or al,al
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jnz pci_fn_1
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; PCI function 0: get pci version (AH.AL)
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movzx edx, al
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cmp al, 13
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ja pci_service_not_supported
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call dword [f62call+edx*4]
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mov dword [esp+32],eax
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ret
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align 4
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pci_api_drv:
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cmp [pci_access_enabled],1
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jne .fail
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cmp eax, 2
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ja .fail
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jmp dword [f62call+eax*4]
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.fail:
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or eax,-1
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ret
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;; ============================================
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pci_fn_0: ; PCI function 0: get pci version (AH.AL)
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movzx eax,word [BOOT_VAR+0x9022]
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ret
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pci_fn_1:
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cmp al,1
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jnz pci_fn_2
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; PCI function 1: get last bus in AL
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pci_fn_1: ; PCI function 1: get last bus in AL
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mov al,[BOOT_VAR+0x9021]
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ret
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pci_fn_2:
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cmp al,2
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jne pci_fn_3
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; PCI function 2: get pci access mechanism
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pci_fn_2: ; PCI function 2: get pci access mechanism
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mov al,[BOOT_VAR+0x9020]
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ret
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pci_fn_3:
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cmp al,4
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jz pci_read_reg ;byte
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cmp al,5
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jz pci_read_reg ;word
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cmp al,6
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jz pci_read_reg ;dword
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cmp al,8
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jz pci_write_reg ;byte
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cmp al,9
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jz pci_write_reg ;word
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cmp al,10
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jz pci_write_reg ;dword
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cmp al,11 ; user-level MMIO functions
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jz pci_mmio_init
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cmp al,12
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jz pci_mmio_map
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cmp al,13
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jz pci_mmio_unmap
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no_pci_access_for_applications:
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pci_service_not_supported:
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or eax,-1
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mov dword [esp+32],eax
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ret
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;***************************************************************************
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; Function
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; pci_make_config_cmd
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;
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; Description
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; creates a command dword for use with the PCI bus
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; bus # in ah
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; device+func in bh (dddddfff)
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; register in bl
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;
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; (for backward compatibility only)
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; command dword returned in eax ( 10000000 bbbbbbbb dddddfff rrrrrr00 )
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;***************************************************************************
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align 4
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pci_make_config_cmd:
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shl eax,8 ; move bus to bits 16-23
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mov ax,bx ; combine all
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@ -114,6 +121,7 @@ pci_make_config_cmd:
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or eax,0x80000000
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ret
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;***************************************************************************
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; Function
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; pci_read_reg:
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@ -126,8 +134,30 @@ pci_make_config_cmd:
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;***************************************************************************
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align 4
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pci_read_reg:
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; push edx
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; xor edx, edx
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; mov dh, ah ; bus
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; mov dl, bh ; dev+fn
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; shl edx, 12
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; mov dl, bl ; reg
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; add edx, PCIe_CONFIG_SPACE
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;
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; and al, 2
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; jz @f
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; mov eax, dword[edx]
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; pop edx
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; ret
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;@@:
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; and al, 1
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; jz @f
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; mov ax, word[edx]
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; pop edx
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; ret
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;@@:
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; mov al, byte[edx]
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; pop edx
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; ret
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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@ -174,10 +204,6 @@ pci_fin_read1:
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pop esi
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ret
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pci_read_reg_err:
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xor eax,eax
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dec eax
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ret
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;***************************************************************************
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@ -193,8 +219,29 @@ pci_read_reg_err:
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;***************************************************************************
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align 4
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pci_write_reg:
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; push edx
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; xor edx, edx
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; mov dh, ah ; bus
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; mov dl, bh ; dev+fn
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; shl edx, 12
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; mov dl, bl ; reg
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; add edx, PCIe_CONFIG_SPACE
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;
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; test al, 2
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; jz @f
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; mov dword[edx], ecx
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; ret
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;@@:
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; test al, 1
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; jz @f
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; mov word[edx], cx
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; pop edx
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; ret
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;@@:
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; mov byte[edx], cl
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; pop edx
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; ret
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push esi ; save register size into ESI
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mov esi,eax
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and esi,3
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@ -233,20 +280,15 @@ pci_write_dword1:
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out dx,eax
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jmp pci_fin_write1
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pci_fin_write1:
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; restore configuration control
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pop eax
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mov dl,0xf8
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out dx,eax
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xor eax,eax
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pop esi
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ret
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pci_write_reg_err:
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xor eax,eax
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dec eax
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ret
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;***************************************************************************
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; Function
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; pci_mmio_init
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@ -322,10 +364,11 @@ pci_mmio_map:
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shl bl, 1
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shl bl, 1
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add bl, 0x10 ; now bl = BAR offset in PCI config. space
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mov ax, [mmio_pci_addr]
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mov bh, al ; bh = dddddfff
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mov al, 2 ; al : DW to read
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call pci_read_reg
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mov eax, dword[mmio_pci_addr]
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shl eax, 12
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mov al, bl ; BAR offset
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add eax, PCIe_CONFIG_SPACE
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mov eax, [eax] ; read the BAR
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or eax, eax
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jnz @f
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mov eax,-3 ; empty I/O space
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@ -337,26 +337,6 @@ endp
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align 4
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proc init_LFB
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; cmp dword [LFBAddress], -1
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; jne @f
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;
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; mov esi, boot_framebuf
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; call boot_log
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;
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; mov [BOOT_VAR+0x901c],byte 2
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; stdcall alloc_pages, (0x280000 / 4096)
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;
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; push eax
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; call alloc_page
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; stdcall map_page_table, LFB_BASE, eax
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; pop eax
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; or eax, PG_UW
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; mov ebx, LFB_BASE
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; mov ecx, 0x280000 / 4096
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; call commit_pages
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; mov [LFBAddress], dword LFB_BASE
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; ret
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;@@:
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call init_mtrr
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mov edx, LFB_BASE
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@ -365,7 +345,6 @@ proc init_LFB
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mov dword [exp_lfb+4], edx
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shr edi, 12 ; C00
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; mov [pg_count], edi
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shr edi, 10 ; 3
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or esi, PG_GLOBAL+PG_LARGE+PG_UW
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@ -559,7 +538,7 @@ update_mem_size:
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; eax= linear address
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;
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; retval
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; eax= phisical page address
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; eax= physical page address
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align 4
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get_pg_addr:
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@ -689,12 +668,8 @@ end if
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test eax,12 ;U/S (+below)
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jnz .fail ;ïðèëîæåíèå îáðàòèëîñü ê ïàìÿòè
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;ÿäðà
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;test eax, 8
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;jnz .fail ;óñòàíîâëåí çàðåçåðâèðîâàííûé áèò
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;â òàáëèöàõ ñòðàíèö. äîáàâëåíî â P4/Xeon
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;ïîïûòêà çàïèñè â çàùèù¸ííóþ ñòðàíèöó ÿäðà
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cmp ebx, tss._io_map_0
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jb .fail
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@ -703,7 +678,6 @@ end if
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; io permission map
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; copy-on-write protection
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call alloc_page
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test eax, eax
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jz .fail
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@ -750,15 +724,8 @@ proc map_mem stdcall, lin_addr:dword,slot:dword,\
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and eax, 0xFFFFF000
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jz .exit
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stdcall map_page,edi,eax,PG_UW
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; inc ebx
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; add edi, 0x1000
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; mov eax, [esi+ebx*4]
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; test eax, eax
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; jz @f
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; and eax, 0xFFFFF000
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; stdcall map_page, edi, eax
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@@: mov edi, [lin_addr]
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mov edi, [lin_addr]
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and edi, 0xFFFFF000
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mov ecx, [buf_size]
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add ecx, 4095
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@ -818,7 +785,7 @@ proc map_memEx stdcall, lin_addr:dword,slot:dword,\
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jz .exit
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stdcall map_page,edi,eax,PG_UW
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@@: mov edi, [lin_addr]
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mov edi, [lin_addr]
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and edi, 0xFFFFF000
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mov ecx, [buf_size]
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add ecx, 4095
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@ -972,29 +939,6 @@ sys_IPC:
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mov [esp+32], eax
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ret
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;align 4
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;proc set_ipc_buff
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; mov eax,[current_slot]
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; pushf
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; cli
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; mov [eax+APPDATA.ipc_start],ebx ;set fields in extended information area
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; mov [eax+APPDATA.ipc_size],ecx
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;
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; add ecx, ebx
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; add ecx, 4095
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; and ecx, not 4095
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;
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;.touch: mov eax, [ebx]
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; add ebx, 0x1000
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; cmp ebx, ecx
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; jb .touch
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;
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; popf
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; xor eax, eax
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; ret
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;endp
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proc sys_ipc_send stdcall, PID:dword, msg_addr:dword, msg_size:dword
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locals
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dst_slot dd ?
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@ -67,7 +67,7 @@ iglobal
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dd 0
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dd 0
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dd 0
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dd sys_pci ; 62-PCI functions
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dd 0 ; 62-PCI functions
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dd sys_msg_board ; 63-System message board
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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@ -138,7 +138,7 @@ iglobal
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dd undefined_syscall ; 59-reserved
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dd sys_IPC ; 60-Inter Process Communication
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dd sys_gs ; 61-Direct graphics access
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dd cross_order ; 62-PCI functions
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dd pci_api ; 62-PCI functions
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dd cross_order ; 63-System message board
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dd sys_resize_app_memory ; 64-Resize application memory usage
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dd sys_putimage_palette ; 65-PutImagePalette
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@ -153,7 +153,7 @@ iglobal
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dd sys_end ; -1-end application
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align 4
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servetable3:
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servetable3: ; Kolibri-A special service
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dd paleholder ; 0
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dd paleholder ; 1
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@ -4188,16 +4188,6 @@ sys_gs: ; direct screen access
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mov [esp+32],eax
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ret
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;align 4 ; PCI functions
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;
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sys_pci:
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call pci_api
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mov [esp+36],eax
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ret
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align 4 ; system functions
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syscall_setpixel: ; SetPixel
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