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IDE DMA

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1) No more 16-bit code, all the code in 32-bit mode
2) Expansion of the data output about modes of IDE devices

git-svn-id: svn://kolibrios.org@4624 a494cfbc-eb01-0410-851d-a64ba20cac60
This commit is contained in:
Marat Zakiyanov (Mario79) 2014-03-10 00:09:59 +00:00
parent 2a493360e5
commit 28e8a442bf
6 changed files with 309 additions and 363 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
kernel/trunk/blkdev/hd_drv.inc
View File

@ -1174,9 +1174,9 @@ cache_write_dma:
;-----------------------------------------------------------------------------
uglobal
align 4
IDEContrProgrammingInterface dd ?
IDE_Interrupt dw ?
IDEContrRegsBaseAddr dw ?
IDEContrProgrammingInterface dw ?
IDE_BAR0_val dw ?
IDE_BAR1_val dw ?
IDE_BAR2_val dw ?

122
kernel/trunk/boot/bootcode.inc
View File

@ -401,128 +401,6 @@ sayerr:
push 0
pop es
xor ax, ax
and word [es:BOOT_IDE_BASE_ADDR], ax ;0
and word [es:BOOT_IDE_BAR0_16], ax ;0
and word [es:BOOT_IDE_BAR1_16], ax ;0
and word [es:BOOT_IDE_BAR2_16], ax ;0
and word [es:BOOT_IDE_BAR3_16], ax ;0
; \begin{Mario79}
; find HDD IDE DMA PCI device
; check for PCI BIOS
mov ax, 0xB101
int 0x1A
jc .nopci
cmp edx, 'PCI '
jnz .nopci
; find PCI class code
; class 1 = mass storage
; subclass 1 = IDE controller
; a) class 1, subclass 1, programming interface 0x80
; This is a Parallel IDE Controller which uses IRQs 14 and 15.
mov ax, 0xB103
mov ecx, 1*10000h + 1*100h + 0x80
mov [es:BOOT_IDE_PI_16], cx
xor si, si ; device index = 0
int 0x1A
jnc .found_1 ; Parallel IDE Controller
; b) class 1, subclass 1, programming interface 0x8f
mov ax, 0xB103
mov ecx, 1*10000h + 1*100h + 0x8f
mov [es:BOOT_IDE_PI_16], cx
xor si, si ; device index = 0
int 0x1A
jnc .found_1
; c) class 1, subclass 1, programming interface 0x85
mov ax, 0xB103
mov ecx, 1*10000h + 1*100h + 0x85
mov [es:BOOT_IDE_PI_16], cx
xor si, si ; device index = 0
int 0x1A
jnc .found_1
; d) class 1, subclass 1, programming interface 0x8A
; This is a Parallel IDE Controller which uses IRQs 14 and 15.
mov ax, 0xB103
mov ecx, 1*10000h + 1*100h + 0x8A
mov [es:BOOT_IDE_PI_16], cx
xor si, si ; device index = 0
int 0x1A
jnc .found_1 ; Parallel IDE Controller
; Controller not found!
xor ax, ax
mov [es:BOOT_IDE_PI_16], ax
jmp .nopci
;--------------------------------------
.found_1:
; get memory base BAR4
mov ax, 0xB10A
mov di, 0x20 ; memory base is config register at 0x20
push cx
int 0x1A
jc .no_BAR4 ;.nopci
and cx, 0xFFFC ; clear address decode type
mov [es:BOOT_IDE_BASE_ADDR], cx
.no_BAR4:
pop cx
;--------------------------------------
.found:
; get Interrupt Line
mov ax, 0xB10A
mov di, 0x3c ; memory base is config register at 0x3c
push cx
int 0x1A
jc .no_Interrupt ;.nopci
mov [es:BOOT_IDE_INTERR_16], cx
.no_Interrupt:
pop cx
;--------------------------------------
; get memory base BAR0
mov ax, 0xB10A
mov di, 0x10 ; memory base is config register at 0x10
push cx
int 0x1A
jc .no_BAR0 ;.nopci
mov [es:BOOT_IDE_BAR0_16], cx
.no_BAR0:
pop cx
;--------------------------------------
; get memory base BAR1
mov ax, 0xB10A
mov di, 0x14 ; memory base is config register at 0x14
push cx
int 0x1A
jc .no_BAR1 ;.nopci
mov [es:BOOT_IDE_BAR1_16], cx
.no_BAR1:
pop cx
;--------------------------------------
; get memory base BAR2
mov ax, 0xB10A
mov di, 0x18 ; memory base is config register at 0x18
push cx
int 0x1A
jc .no_BAR2 ;.nopci
mov [es:BOOT_IDE_BAR2_16], cx
.no_BAR2:
pop cx
;--------------------------------------
; get memory base BAR3
mov ax, 0xB10A
mov di, 0x1C ; memory base is config register at 0x1c
push cx
int 0x1A
jc .no_BAR3 ;.nopci
mov [es:BOOT_IDE_BAR3_16], cx
.no_BAR3:
pop cx
;--------------------------------------
.nopci:
; \end{Mario79}
mov al, 0xf6 ; Сброс клавиатуры, разрешить сканирование
out 0x60, al

14
kernel/trunk/const.inc
View File

@ -302,7 +302,7 @@ BOOT_DEBUG_PRINT equ 0x901E ;byte If nonzero, duplicates debug output to
BOOT_DMA equ 0x901F ;
BOOT_PCI_DATA equ 0x9020 ;8bytes pci data
BOOT_VRR equ 0x9030 ;byte VRR start enabled 1, 2-no
BOOT_IDE_BASE_ADDR equ 0x9031 ;word IDEContrRegsBaseAddr
;BOOT_IDE_BASE_ADDR equ 0x9031 ;word IDEContrRegsBaseAddr ; now free and is not used
BOOT_MEM_AMOUNT equ 0x9034 ;dword memory amount
BOOT_APM_ENTRY equ 0x9040
@ -311,12 +311,12 @@ BOOT_APM_FLAGS equ 0x9046 ;unused
BOOT_APM_CODE_32 equ 0x9050
BOOT_APM_CODE_16 equ 0x9052
BOOT_APM_DATA_16 equ 0x9054
BOOT_IDE_BAR0_16 equ 0x9056
BOOT_IDE_BAR1_16 equ 0x9058
BOOT_IDE_BAR2_16 equ 0x905A
BOOT_IDE_BAR3_16 equ 0x905C
BOOT_IDE_PI_16 equ 0x905E
BOOT_IDE_INTERR_16 equ 0x9060
;BOOT_IDE_BAR0_16 equ 0x9056 ; now free and is not used
;BOOT_IDE_BAR1_16 equ 0x9058 ; now free and is not used
;BOOT_IDE_BAR2_16 equ 0x905A ; now free and is not used
;BOOT_IDE_BAR3_16 equ 0x905C ; now free and is not used
;BOOT_IDE_PI_16 equ 0x905E ; now free and is not used
;BOOT_IDE_INTERR_16 equ 0x9060 ; now free and is not used
TMP_FILE_NAME equ 0
TMP_CMD_LINE equ 1024

33
kernel/trunk/detect/dev_hdcd.inc
View File

@ -85,19 +85,44 @@ Print_Device_Name:
xor eax, eax
mov ax, [Sector512+64*2]
DEBUGF 1, "K : PIO mode %x\n", eax
DEBUGF 1, "K : PIO mode possible modes %x\n", al
mov ax, [Sector512+51*2]
mov al, ah
call convert_Sector512_value
DEBUGF 1, "K : PIO mode set mode %x\n", ah
mov ax, [Sector512+63*2]
DEBUGF 1, "K : Multiword DMA mode %x\n", eax
DEBUGF 1, "K : Multiword DMA possible modes %x\n", al
mov al, ah
call convert_Sector512_value
DEBUGF 1, "K : Multiword DMA set mode %x\n", ah
mov ax, [Sector512+88*2]
DEBUGF 1, "K : Ultra DMA mode %x\n", eax
DEBUGF 1, "K : Ultra DMA possible modes %x\n", al
mov al, ah
call convert_Sector512_value
DEBUGF 1, "K : Ultra DMA set mode %x\n", ah
FindHDD_2_2:
ret
;-----------------------------------------------------------------------------
FindHDD_3:
call FindHDD_1
shl byte [DRIVE_DATA+1], 2
ret
;-----------------------------------------------------------------------------
convert_Sector512_value:
mov ecx, 8
xor ah, ah
@@:
test al, 1b
jnz .end
shr al, 1
inc ah
loop @b
xor ah, ah
.end:
ret
;-----------------------------------------------------------------------------
; Адрес считываемого сектора в режиме LBA
uglobal
SectorAddress DD ?

267
kernel/trunk/detect/init_ata.inc Normal file
View File

@ -0,0 +1,267 @@
;-----------------------------------------------------------------------------
; find the IDE controller in the device list
;-----------------------------------------------------------------------------
mov esi, pcidev_list
.loop:
mov esi, [esi+PCIDEV.fd]
cmp esi, pcidev_list
jz .done
mov eax, [esi+PCIDEV.class]
shr eax, 4
cmp eax, 0x01018
jnz .loop
.found:
mov eax, [esi+PCIDEV.class]
DEBUGF 1, 'K : IDE controller programming interface %x\n', eax
mov [IDEContrProgrammingInterface], eax
mov ah, [esi+PCIDEV.bus]
mov al, 2
mov bh, [esi+PCIDEV.devfn]
;-----------------------------------------------------------------------------
mov bl, 0x10
push eax
call pci_read_reg
and eax, 0xFFFC
cmp ax, 0
je @f
cmp ax, 1
jne .show_BAR0
@@:
mov ax, 0x1F0
.show_BAR0:
DEBUGF 1, 'K : BAR0 IDE base addr %x\n', ax
mov [StandardATABases], ax
mov [hd_address_table], eax
mov [hd_address_table+8], eax
mov [IDE_BAR0_val], ax
pop eax
;-----------------------------------------------------------------------------
mov bl, 0x14
push eax
call pci_read_reg
and eax, 0xFFFC
cmp ax, 0
je @f
cmp ax, 1
jne .show_BAR1
@@:
mov ax, 0x3F4
.show_BAR1:
DEBUGF 1, 'K : BAR1 IDE base addr %x\n', ax
mov [IDE_BAR1_val], ax
pop eax
;-----------------------------------------------------------------------------
mov bl, 0x18
push eax
call pci_read_reg
and eax, 0xFFFC
cmp ax, 0
je @f
cmp ax, 1
jne .show_BAR2
@@:
mov ax, 0x170
.show_BAR2:
DEBUGF 1, 'K : BAR2 IDE base addr %x\n', ax
mov [StandardATABases+2], ax
mov [hd_address_table+16], eax
mov [hd_address_table+24], eax
mov [IDE_BAR2_val], ax
pop eax
;-----------------------------------------------------------------------------
mov bl, 0x1C
push eax
call pci_read_reg
and eax, 0xFFFC
cmp ax, 0
je @f
cmp ax, 1
jne .show_BAR3
@@:
mov ax, 0x374
.show_BAR3:
DEBUGF 1, 'K : BAR3 IDE base addr %x\n', ax
mov [IDE_BAR3_val], ax
pop eax
;-----------------------------------------------------------------------------
mov bl, 0x20
push eax
call pci_read_reg
and eax, 0xFFFC
DEBUGF 1, 'K : BAR4 IDE controller register base addr %x\n', ax
mov [IDEContrRegsBaseAddr], ax
pop eax
;-----------------------------------------------------------------------------
mov bl, 0x3C
push eax
call pci_read_reg
and eax, 0xFF
DEBUGF 1, 'K : IDE Interrupt %x\n', al
mov [IDE_Interrupt], ax
pop eax
;-----------------------------------------------------------------------------
.done:
;-----------------------------------------------------------------------------
; START of initialisation IDE ATA code
;-----------------------------------------------------------------------------
cmp [IDEContrProgrammingInterface], 0
je set_interrupts_for_IDE_controllers.continue
mov esi, boot_disabling_ide
call boot_log
;--------------------------------------
; Disable IDE interrupts, because the search
; for IDE partitions is in the PIO mode.
;--------------------------------------
.disable_IDE_interrupt:
; Disable interrupts in IDE controller for PIO
mov al, 2
mov dx, [IDE_BAR1_val] ;0x3F4
add dx, 2 ;0x3F6
out dx, al
mov dx, [IDE_BAR3_val] ;0x374
add dx, 2 ;0x376
out dx, al
@@:
; show base variables of IDE controller
; DEBUGF 1, "K : BAR0 %x \n", [IDE_BAR0_val]:4
; DEBUGF 1, "K : BAR1 %x \n", [IDE_BAR1_val]:4
; DEBUGF 1, "K : BAR2 %x \n", [IDE_BAR2_val]:4
; DEBUGF 1, "K : BAR3 %x \n", [IDE_BAR3_val]:4
; DEBUGF 1, "K : BAR4 %x \n", [IDEContrRegsBaseAddr]:4
; DEBUGF 1, "K : IDEContrProgrammingInterface %x \n", [IDEContrProgrammingInterface]:4
; DEBUGF 1, "K : IDE_Interrupt %x \n", [IDE_Interrupt]:4
;-----------------------------------------------------------------------------
mov esi, boot_detecthdcd
call boot_log
include 'detect/dev_hdcd.inc'
mov esi, boot_getcache
call boot_log
include 'detect/getcache.inc'
mov esi, boot_detectpart
call boot_log
include 'detect/sear_par.inc'
;-----------------------------------------------------------------------------
mov dx, [IDEContrRegsBaseAddr]
; test whether it is our interrupt?
add dx, 2
in al, dx
test al, 100b
jz @f
; clear Bus Master IDE Status register
; clear Interrupt bit
out dx, al
@@:
add dx, 8
; test whether it is our interrupt?
in al, dx
test al, 100b
jz @f
; clear Bus Master IDE Status register
; clear Interrupt bit
out dx, al
@@:
; read status register and remove the interrupt request
mov dx, [IDE_BAR0_val] ;0x1F0
add dx, 0x7 ;0x1F7
in al, dx
mov dx, [IDE_BAR2_val] ;0x170
add dx, 0x7 ;0x177
in al, dx
;-----------------------------------------------------------------------------
push eax edx
mov dx, [IDEContrRegsBaseAddr]
xor eax, eax
add dx, 2
in al, dx
DEBUGF 1, "K : Primary Bus Master IDE Status Register %x\n", eax
add dx, 8
in al, dx
DEBUGF 1, "K : Secondary Bus Master IDE Status Register %x\n", eax
pop edx eax
cmp [IDEContrRegsBaseAddr], 0
setnz [dma_hdd]
;-----------------------------------------------------------------------------
; set interrupts for IDE Controller
;-----------------------------------------------------------------------------
mov esi, boot_set_int_IDE
call boot_log
set_interrupts_for_IDE_controllers:
mov eax, [IDEContrProgrammingInterface]
cmp ax, 0x0180
je .pata_ide
cmp ax, 0x018a
jne .sata_ide
;--------------------------------------
.pata_ide:
cmp [IDEContrRegsBaseAddr], 0
je .end_set_interrupts
stdcall attach_int_handler, 14, IDE_irq_14_handler, 0
DEBUGF 1, "K : Set IDE IRQ14 return code %x\n", eax
stdcall attach_int_handler, 15, IDE_irq_15_handler, 0
DEBUGF 1, "K : Set IDE IRQ15 return code %x\n", eax
jmp .enable_IDE_interrupt
;--------------------------------------
.sata_ide:
cmp ax, 0x0185
je .sata_ide_1
cmp ax, 0x018f
jne .end_set_interrupts
;--------------------------------------
.sata_ide_1:
cmp [IDEContrRegsBaseAddr], 0
je .end_set_interrupts
mov ax, [IDE_Interrupt]
movzx eax, al
stdcall attach_int_handler, eax, IDE_common_irq_handler, 0
DEBUGF 1, "K : Set IDE IRQ%d return code %x\n", [IDE_Interrupt]:1, eax
;--------------------------------------
.enable_IDE_interrupt:
mov esi, boot_enabling_ide
call boot_log
; Enable interrupts in IDE controller for DMA
mov al, 0
mov ah, [DRIVE_DATA+1]
test ah, 10100000b
jz @f
DEBUGF 1, "K : IDE CH1 PIO, because ATAPI drive present\n"
jmp .ch2_check
@@:
mov dx, [IDE_BAR1_val] ;0x3F4
add dx, 2 ;0x3F6
out dx, al
DEBUGF 1, "K : IDE CH1 DMA enabled\n"
.ch2_check:
test ah, 1010b
jz @f
DEBUGF 1, "K : IDE CH2 PIO, because ATAPI drive present\n"
jmp .end_set_interrupts
@@:
mov dx, [IDE_BAR3_val] ;0x374
add dx, 2 ;0x376
out dx, al
DEBUGF 1, "K : IDE CH2 DMA enabled\n"
;--------------------------------------
.end_set_interrupts:
;-----------------------------------------------------------------------------
cmp [dma_hdd], 0
je .print_pio
.print_dma:
DEBUGF 1, "K : IDE DMA mode\n"
jmp .continue
.print_pio:
DEBUGF 1, "K : IDE PIO mode\n"
.continue:
;-----------------------------------------------------------------------------
; END of initialisation IDE ATA code
;-----------------------------------------------------------------------------

234
kernel/trunk/kernel.asm
View File

@ -372,75 +372,6 @@ high_code:
;-----------------------------------------------------------------------------
; SAVE REAL MODE VARIABLES
;-----------------------------------------------------------------------------
save_variables_IDE_controller:
xor eax, eax
mov ax, [BOOT_VARS + BOOT_IDE_INTERR_16]
mov [IDE_Interrupt], ax
;--------------------------------------
mov ax, [BOOT_VARS + BOOT_IDE_PI_16]
mov [IDEContrProgrammingInterface], ax
;--------------------------------------
mov ax, [BOOT_VARS + BOOT_IDE_BASE_ADDR]
mov [IDEContrRegsBaseAddr], ax
;--------------------------------------
mov ax, [BOOT_VARS + BOOT_IDE_BAR0_16]
cmp ax, 0
je @f
cmp ax, 1
jne .no_PATA_BAR0
@@:
mov ax, 0x1F0
jmp @f
.no_PATA_BAR0:
and ax, 0xFFFC
@@:
mov [StandardATABases], ax
mov [hd_address_table], eax
mov [hd_address_table+8], eax
mov [IDE_BAR0_val], ax
;--------------------------------------
mov ax, [BOOT_VARS + BOOT_IDE_BAR1_16]
cmp ax, 0
je @f
cmp ax, 1
jne .no_PATA_BAR1
@@:
mov ax, 0x3F4
jmp @f
.no_PATA_BAR1:
and ax, 0xFFFC
@@:
mov [IDE_BAR1_val], ax
;--------------------------------------
mov ax, [BOOT_VARS + BOOT_IDE_BAR2_16]
cmp ax, 0
je @f
cmp ax, 1
jne .no_PATA_BAR2
@@:
mov ax, 0x170
jmp @f
.no_PATA_BAR2:
and ax, 0xFFFC
@@:
mov [StandardATABases+2], ax
mov [hd_address_table+16], eax
mov [hd_address_table+24], eax
mov [IDE_BAR2_val], ax
;--------------------------------------
mov ax, [BOOT_VARS + BOOT_IDE_BAR3_16]
cmp ax, 0
je @f
cmp ax, 1
jne .no_PATA_BAR3
@@:
mov ax, 0x374
jmp @f
.no_PATA_BAR3:
and ax, 0xFFFC
@@:
mov [IDE_BAR3_val], ax
; --------------- APM ---------------------
; init selectors
@ -797,167 +728,14 @@ no_mode_0x12:
call boot_log
include 'detect/dev_fd.inc'
;-----------------------------------------------------------------------------
; START of initialisation IDE ATA code
; create pci-devices list
;-----------------------------------------------------------------------------
cmp [IDEContrProgrammingInterface], 0
je set_interrupts_for_IDE_controllers.continue
mov esi, boot_disabling_ide
call boot_log
;--------------------------------------
; Disable IDE interrupts, because the search
; for IDE partitions is in the PIO mode.
;--------------------------------------
.disable_IDE_interrupt:
; Disable interrupts in IDE controller for PIO
mov al, 2
mov dx, [IDE_BAR1_val] ;0x3F4
add dx, 2 ;0x3F6
out dx, al
mov dx, [IDE_BAR3_val] ;0x374
add dx, 2 ;0x376
out dx, al
@@:
; show base variables of IDE controller
DEBUGF 1, "K : BAR0 %x \n", [IDE_BAR0_val]:4
DEBUGF 1, "K : BAR1 %x \n", [IDE_BAR1_val]:4
DEBUGF 1, "K : BAR2 %x \n", [IDE_BAR2_val]:4
DEBUGF 1, "K : BAR3 %x \n", [IDE_BAR3_val]:4
DEBUGF 1, "K : BAR4 %x \n", [IDEContrRegsBaseAddr]:4
DEBUGF 1, "K : IDEContrProgrammingInterface %x \n", [IDEContrProgrammingInterface]:4
DEBUGF 1, "K : IDE_Interrupt %x \n", [IDE_Interrupt]:4
mov [pci_access_enabled], 1
call pci_enum
;-----------------------------------------------------------------------------
mov esi, boot_detecthdcd
call boot_log
include 'detect/dev_hdcd.inc'
mov esi, boot_getcache
call boot_log
include 'detect/getcache.inc'
mov esi, boot_detectpart
call boot_log
include 'detect/sear_par.inc'
; initialisation IDE ATA code
;-----------------------------------------------------------------------------
mov dx, [IDEContrRegsBaseAddr]
; test whether it is our interrupt?
add dx, 2
in al, dx
test al, 100b
jz @f
; clear Bus Master IDE Status register
; clear Interrupt bit
out dx, al
@@:
add dx, 8
; test whether it is our interrupt?
in al, dx
test al, 100b
jz @f
; clear Bus Master IDE Status register
; clear Interrupt bit
out dx, al
@@:
; read status register and remove the interrupt request
mov dx, [IDE_BAR0_val] ;0x1F0
add dx, 0x7 ;0x1F7
in al, dx
mov dx, [IDE_BAR2_val] ;0x170
add dx, 0x7 ;0x177
in al, dx
;-----------------------------------------------------------------------------
push eax edx
mov dx, [IDEContrRegsBaseAddr]
xor eax, eax
add dx, 2
in al, dx
DEBUGF 1, "K : Primary Bus Master IDE Status Register %x\n", eax
add dx, 8
in al, dx
DEBUGF 1, "K : Secondary Bus Master IDE Status Register %x\n", eax
pop edx eax
cmp [IDEContrRegsBaseAddr], 0
setnz [dma_hdd]
;-----------------------------------------------------------------------------
; set interrupts for IDE Controller
;-----------------------------------------------------------------------------
mov esi, boot_set_int_IDE
call boot_log
set_interrupts_for_IDE_controllers:
mov ax, [IDEContrProgrammingInterface]
cmp ax, 0x0180
je .pata_ide
cmp ax, 0x018a
jne .sata_ide
;--------------------------------------
.pata_ide:
cmp [IDEContrRegsBaseAddr], 0
je .end_set_interrupts
stdcall attach_int_handler, 14, IDE_irq_14_handler, 0
DEBUGF 1, "K : Set IDE IRQ14 return code %x\n", eax
stdcall attach_int_handler, 15, IDE_irq_15_handler, 0
DEBUGF 1, "K : Set IDE IRQ15 return code %x\n", eax
jmp .enable_IDE_interrupt
;--------------------------------------
.sata_ide:
cmp ax, 0x0185
je .sata_ide_1
cmp ax, 0x018f
jne .end_set_interrupts
;--------------------------------------
.sata_ide_1:
cmp [IDEContrRegsBaseAddr], 0
je .end_set_interrupts
mov ax, [IDE_Interrupt]
movzx eax, al
stdcall attach_int_handler, eax, IDE_common_irq_handler, 0
DEBUGF 1, "K : Set IDE IRQ%d return code %x\n", [IDE_Interrupt]:1, eax
;--------------------------------------
.enable_IDE_interrupt:
mov esi, boot_enabling_ide
call boot_log
; Enable interrupts in IDE controller for DMA
mov al, 0
mov ah, [DRIVE_DATA+1]
test ah, 10100000b
jz @f
DEBUGF 1, "K : IDE CH1 PIO, because ATAPI drive present\n"
jmp .ch2_check
@@:
mov dx, [IDE_BAR1_val] ;0x3F4
add dx, 2 ;0x3F6
out dx, al
DEBUGF 1, "K : IDE CH1 DMA enabled\n"
.ch2_check:
test ah, 1010b
jz @f
DEBUGF 1, "K : IDE CH2 PIO, because ATAPI drive present\n"
jmp .end_set_interrupts
@@:
mov dx, [IDE_BAR3_val] ;0x374
add dx, 2 ;0x376
out dx, al
DEBUGF 1, "K : IDE CH2 DMA enabled\n"
;--------------------------------------
.end_set_interrupts:
;-----------------------------------------------------------------------------
cmp [dma_hdd], 0
je .print_pio
.print_dma:
DEBUGF 1, "K : IDE DMA mode\n"
jmp .continue
.print_pio:
DEBUGF 1, "K : IDE PIO mode\n"
.continue:
;-----------------------------------------------------------------------------
; END of initialisation IDE ATA code
include 'detect/init_ata.inc'
;-----------------------------------------------------------------------------
mov esi, boot_init_sys
call boot_log
@ -1022,8 +800,6 @@ end if
; mov esi, boot_devices
; call boot_log
mov [pci_access_enabled], 1
call pci_enum
call clear_pci_ide_interrupts
include "detect/vortex86.inc" ; Vortex86 SoC detection code