2012-12-16 23:05:06 +04:00
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#include <drm/drmP.h>
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#include <drm/radeon_drm.h>
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#include "radeon.h"
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#include "hmm.h"
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#include "bitmap.h"
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2013-07-05 11:43:48 +04:00
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#define DRIVER_CAPS_0 HW_BIT_BLIT
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//#define DRIVER_CAPS_0 0
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2012-12-16 23:05:06 +04:00
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#define DRIVER_CAPS_1 0
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struct context *context_map[256];
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struct hmm bm_mm;
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extern struct drm_device *main_drm_device;
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2013-07-05 11:43:48 +04:00
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#if 0
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2012-12-16 23:05:06 +04:00
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void __attribute__((regparm(1))) destroy_bitmap(bitmap_t *bitmap)
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{
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// dma_addr_t *pages = bitmap->obj->allocated_pages;
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int i;
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free_handle(&bm_mm, bitmap->handle);
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bitmap->handle = 0;
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// bitmap->obj->base.read_domains = I915_GEM_DOMAIN_GTT;
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// bitmap->obj->base.write_domain = I915_GEM_DOMAIN_CPU;
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// mutex_lock(&main_device->struct_mutex);
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// drm_gem_object_unreference(&bitmap->obj->base);
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// mutex_unlock(&main_device->struct_mutex);
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// if(pages != NULL)
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// {
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// for (i = 0; i < bitmap->page_count; i++)
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// FreePage(pages[i]);
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// DRM_DEBUG("%s release %d pages\n", __FUNCTION__, bitmap->page_count);
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// free(pages);
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// };
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UserFree(bitmap->uaddr);
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__DestroyObject(bitmap);
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};
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static int bitmap_get_pages_gtt(struct drm_i915_gem_object *obj)
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{
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int page_count;
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/* Get the list of pages out of our struct file. They'll be pinned
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* at this point until we release them.
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*/
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page_count = obj->base.size / PAGE_SIZE;
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BUG_ON(obj->allocated_pages == NULL);
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BUG_ON(obj->pages.page != NULL);
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obj->pages.page = obj->allocated_pages;
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obj->pages.nents = page_count;
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// if (obj->tiling_mode != I915_TILING_NONE)
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// i915_gem_object_do_bit_17_swizzle(obj);
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return 0;
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}
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static void bitmap_put_pages_gtt(struct drm_i915_gem_object *obj)
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{
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int ret, i;
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BUG_ON(obj->madv == __I915_MADV_PURGED);
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ret = i915_gem_object_set_to_cpu_domain(obj, true);
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if (ret) {
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/* In the event of a disaster, abandon all caches and
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* hope for the best.
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*/
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WARN_ON(ret != -EIO);
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i915_gem_clflush_object(obj);
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obj->base.read_domains = obj->base.write_domain = I915_GEM_DOMAIN_CPU;
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}
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if (obj->madv == I915_MADV_DONTNEED)
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obj->dirty = 0;
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obj->dirty = 0;
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}
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static const struct drm_i915_gem_object_ops bitmap_object_ops = {
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.get_pages = bitmap_get_pages_gtt,
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.put_pages = bitmap_put_pages_gtt,
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};
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struct io_call_10 /* SRV_CREATE_SURFACE */
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{
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u32 handle; // ignored
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void *data; // ignored
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u32 width;
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u32 height;
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u32 pitch; // ignored
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u32 max_width;
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u32 max_height;
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u32 format; // reserved mbz
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};
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int create_surface(struct drm_device *dev, struct io_call_10 *pbitmap)
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{
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struct radeon_device *rdev = dev->dev_private;
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struct radeon_bo *obj = NULL;
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bitmap_t *bitmap;
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u32 handle;
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u32 width, max_width;
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u32 height, max_height;
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u32 size, max_size;
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u32 pitch, max_pitch;
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void *uaddr;
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dma_addr_t *pages;
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u32 page_count;
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int i;
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int ret;
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pbitmap->handle = 0;
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pbitmap->data = (void*)-1;
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width = pbitmap->width;
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height = pbitmap->height;
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if((width == 0)||(height == 0)||(width > 4096)||(height > 4096))
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goto err1;
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max_width = (pbitmap->max_width ==0) ? width : pbitmap->max_width;
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max_height = (pbitmap->max_height==0) ? height : pbitmap->max_height;
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handle = alloc_handle(&bm_mm);
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// printf("%s %d\n",__FUNCTION__, handle);
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if(handle == 0)
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goto err1;
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bitmap = CreateObject(GetPid(), sizeof(*bitmap));
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// printf("bitmap %x\n", bitmap);
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if( bitmap == NULL)
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goto err2;
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bitmap->handle = handle;
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bitmap->header.destroy = destroy_bitmap;
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bitmap->obj = NULL;
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hmm_set_data(&bm_mm, handle, bitmap);
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pitch = ALIGN(width*4,64);
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size = roundup(pitch*height, PAGE_SIZE);
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// printf("pitch %d size %d\n", pitch, size);
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max_pitch = ALIGN(max_width*4,64);
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max_size = roundup(max_pitch*max_height, PAGE_SIZE);
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// printf("max_pitch %d max_size %d\n", max_pitch, max_size);
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ret = radeon_bo_create(rdev, size, PAGE_SIZE, false, RADEON_GEM_DOMAIN_GTT, NULL, &obj);
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if (unlikely(ret != 0))
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goto err3;
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ret = radeon_bo_reserve(obj, false);
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if (unlikely(ret != 0))
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goto err3;
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ret = radeon_bo_pin(obj, RADEON_GEM_DOMAIN_GTT, NULL);
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if (unlikely(ret != 0))
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goto err3;
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2013-07-05 11:43:48 +04:00
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#ifndef __TTM__
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2012-12-16 23:05:06 +04:00
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ret = radeon_bo_user_map(obj, (void**)&uaddr);
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if (unlikely(ret != 0))
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goto err3;
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2013-07-05 11:43:48 +04:00
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#endif
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2012-12-16 23:05:06 +04:00
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bitmap->page_count = size/PAGE_SIZE;
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bitmap->max_count = max_size/PAGE_SIZE;
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2013-01-22 19:16:44 +04:00
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// DRM_DEBUG("%s alloc %d pages\n", __FUNCTION__, page_count);
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2012-12-16 23:05:06 +04:00
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bitmap->handle = handle;
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bitmap->uaddr = uaddr;
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bitmap->pitch = pitch;
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bitmap->gaddr = radeon_bo_gpu_offset(obj);
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bitmap->width = width;
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bitmap->height = height;
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bitmap->max_width = max_width;
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bitmap->max_height = max_height;
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bitmap->obj = obj;
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bitmap->header.destroy = destroy_bitmap;
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pbitmap->handle = handle;
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pbitmap->data = uaddr;
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pbitmap->pitch = pitch;
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DRM_DEBUG("%s handle: %d pitch: %d gpu_addr: %x user_addr: %x\n",
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__FUNCTION__, handle, pitch, bitmap->gaddr, uaddr);
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return 0;
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err5:
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// mutex_lock(&dev->struct_mutex);
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// drm_gem_object_unreference(&obj->base);
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// mutex_unlock(&dev->struct_mutex);
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err4:
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// while (i--)
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// FreePage(pages[i]);
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// free(pages);
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// UserFree(uaddr);
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err3:
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__DestroyObject(bitmap);
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err2:
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free_handle(&bm_mm, handle);
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err1:
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return -1;
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};
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int lock_surface(struct io_call_12 *pbitmap)
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{
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int ret;
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bitmap_t *bitmap;
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if(unlikely(pbitmap->handle == 0))
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return -1;
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bitmap = (bitmap_t*)hmm_get_data(&bm_mm, pbitmap->handle);
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if(unlikely(bitmap==NULL))
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return -1;
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/*
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mutex_lock(&main_device->struct_mutex);
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ret = i915_gem_object_set_to_cpu_domain(bitmap->obj, true);
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mutex_unlock(&main_device->struct_mutex);
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if(ret != 0 )
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{
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pbitmap->data = NULL;
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pbitmap->pitch = 0;
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dbgprintf("%s fail\n", __FUNCTION__);
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return ret;
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};
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*/
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pbitmap->data = bitmap->uaddr;
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pbitmap->pitch = bitmap->pitch;
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return 0;
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};
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#if 0
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int resize_surface(struct io_call_14 *pbitmap)
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{
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bitmap_t *bitmap;
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dma_addr_t page, *pages;
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u32 size, page_count;
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u32 width, height;
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u32 pitch;
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int i;
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int ret = 0;
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if(unlikely(pbitmap->handle == 0))
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return -1;
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bitmap = (bitmap_t*)hmm_get_data(&bm_mm, pbitmap->handle);
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if(unlikely(bitmap==NULL))
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return -1;
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if( pbitmap->new_width > bitmap->max_width ||
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pbitmap->new_height > bitmap->max_height)
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return -1;
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width = pbitmap->new_width;
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height = pbitmap->new_height;
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pitch = ALIGN(width*4,64);
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size = roundup(pitch * height, PAGE_SIZE);
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page_count = size/PAGE_SIZE;
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DRM_DEBUG("new width %d height %d pitch %d size %d\n",
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width, height, pitch, size);
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if(page_count > bitmap->page_count)
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{
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char *vaddr = bitmap->uaddr + PAGE_SIZE * bitmap->page_count;
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pages = bitmap->obj->allocated_pages;
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DRM_DEBUG("old pages %d new_pages %d vaddr %x\n",
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bitmap->page_count, page_count, vaddr);
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for(i = bitmap->page_count; i < page_count; i++, vaddr+= PAGE_SIZE)
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{
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page = AllocPage();
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if ( page == 0 )
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goto err4;
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pages[i] = page;
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MapPage(vaddr, page, 0x207); //map as shared page
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};
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DRM_DEBUG("%s alloc %d pages\n", __FUNCTION__,
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page_count - bitmap->page_count);
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i915_gem_object_unpin(bitmap->obj);
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i915_gem_object_unbind(bitmap->obj);
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bitmap->obj->base.size = size;
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bitmap->obj->pages.nents = page_count;
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ret = i915_gem_object_pin(bitmap->obj, PAGE_SIZE, true,true);
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if (ret)
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goto err4;
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bitmap->page_count = page_count;
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bitmap->gaddr = bitmap->obj->gtt_offset;
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}
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else if(page_count < bitmap->page_count)
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{
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char *vaddr = bitmap->uaddr + PAGE_SIZE * page_count;
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i915_gem_object_unpin(bitmap->obj);
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i915_gem_object_unbind(bitmap->obj);
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pages = bitmap->obj->allocated_pages;
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DRM_DEBUG("old pages %d new_pages %d vaddr %x\n",
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bitmap->page_count, page_count, vaddr);
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for(i = page_count; i < bitmap->page_count; i++, vaddr+= PAGE_SIZE)
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{
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MapPage(vaddr, 0, 0); //unmap
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FreePage(pages[i]);
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pages[i] = 0;
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};
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DRM_DEBUG("%s release %d pages\n", __FUNCTION__,
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bitmap->page_count - page_count);
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bitmap->obj->base.size = size;
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bitmap->obj->pages.nents = page_count;
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ret = i915_gem_object_pin(bitmap->obj, PAGE_SIZE, true,true);
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if (ret)
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goto err3;
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bitmap->page_count = page_count;
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bitmap->gaddr = bitmap->obj->gtt_offset;
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};
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bitmap->width = width;
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bitmap->height = height;
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bitmap->pitch = pitch;
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pbitmap->data = bitmap->uaddr;
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pbitmap->pitch = bitmap->pitch;
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return 0;
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err4:
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while (i-- > bitmap->page_count)
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FreePage(pages[i]);
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err3:
|
|
|
|
return -1;
|
|
|
|
};
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
|
|
int init_bitmaps()
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = init_hmm(&bm_mm, 1024);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
int get_driver_caps(hwcaps_t *caps)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
ENTER();
|
|
|
|
switch(caps->idx)
|
|
|
|
{
|
|
|
|
case 0:
|
|
|
|
caps->opt[0] = DRIVER_CAPS_0;
|
|
|
|
caps->opt[1] = DRIVER_CAPS_1;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 1:
|
|
|
|
caps->cap1.max_tex_width = 4096;
|
|
|
|
caps->cap1.max_tex_height = 4096;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = 1;
|
|
|
|
};
|
|
|
|
caps->idx = 1;
|
|
|
|
LEAVE();
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void __attribute__((regparm(1))) destroy_context(struct context *context)
|
|
|
|
{
|
|
|
|
struct radeon_device *rdev = main_drm_device->dev_private;
|
|
|
|
|
|
|
|
DRM_DEBUG("destroy context %x\n", context);
|
|
|
|
|
|
|
|
context_map[context->slot] = NULL;
|
|
|
|
|
|
|
|
radeon_ib_free(rdev, &context->ib);
|
|
|
|
|
|
|
|
__DestroyObject(context);
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
#define CURRENT_TASK (0x80003000)
|
|
|
|
|
|
|
|
struct context *get_context(struct drm_device *dev)
|
|
|
|
{
|
|
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
|
|
struct context *context;
|
|
|
|
struct io_call_10 io_10;
|
|
|
|
int slot = *((u8*)CURRENT_TASK);
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
context = context_map[slot];
|
|
|
|
|
|
|
|
if( context != NULL)
|
|
|
|
return context;
|
|
|
|
|
|
|
|
context = CreateObject(GetPid(), sizeof(*context));
|
|
|
|
|
|
|
|
if( context != NULL)
|
|
|
|
{
|
|
|
|
ret = radeon_ib_get(rdev, RADEON_RING_TYPE_GFX_INDEX, &context->ib, NULL, 4096);
|
|
|
|
if (ret) {
|
|
|
|
DRM_ERROR("radeon: failed to get ib (%d).\n", ret);
|
|
|
|
goto err;
|
|
|
|
};
|
|
|
|
|
|
|
|
context->cmd_buffer = context->ib.ptr;
|
|
|
|
|
|
|
|
context->header.destroy = destroy_context;
|
|
|
|
context->mask = NULL;
|
|
|
|
context->seqno = 0;
|
|
|
|
context->slot = slot;
|
|
|
|
|
|
|
|
context_map[slot] = context;
|
|
|
|
};
|
|
|
|
return context;
|
|
|
|
|
|
|
|
err:
|
|
|
|
__DestroyObject(context);
|
|
|
|
return NULL;
|
|
|
|
};
|
|
|
|
|
2013-07-05 11:43:48 +04:00
|
|
|
#endif
|
2012-12-16 23:05:06 +04:00
|
|
|
|