haiku/headers/private/kernel/arch/riscv64/arch_int.h
X512 8ca0f03d0c riscv64/smp: Implement multi-processor support
* Working under qemu smp 1,2+
* Working on SiFive Unmatched
* x86_64 efi not broken by smp_boot_other_cpus change

Change-Id: I32ebc17913e46ed082be9ade8f56448bbf12f16e
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4705
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
2021-12-12 15:35:24 +00:00

78 lines
1.6 KiB
C

/*
* Copyright 2005-2019, Haiku, Inc. All rights reserved.
* Distributed under the terms of the MIT License.
*
* Authors:
* Axel Dörfler <axeld@pinc-software.de>
* Ingo Weinhold <bonefish@cs.tu-berlin.de>
*/
#ifndef _KERNEL_ARCH_RISCV64_INT_H
#define _KERNEL_ARCH_RISCV64_INT_H
#include <SupportDefs.h>
#include <arch_cpu_defs.h>
#define NUM_IO_VECTORS 256
#ifdef __cplusplus
static inline void
arch_int_enable_interrupts_inline(void)
{
// TODO: Use atomic CSRRS?
SstatusReg status(Sstatus());
status.ie |= (1 << modeS);
SetSstatus(status.val);
}
static inline int
arch_int_disable_interrupts_inline(void)
{
// TODO: Use atomic CSRRC?
SstatusReg status(Sstatus());
int oldState = ((1 << modeS) & status.ie) != 0;
status.ie &= ~(1 << modeS);
SetSstatus(status.val);
return oldState;
}
static inline void
arch_int_restore_interrupts_inline(int oldState)
{
if (oldState)
arch_int_enable_interrupts_inline();
}
static inline bool
arch_int_are_interrupts_enabled_inline(void)
{
SstatusReg status(Sstatus());
return ((1 << modeS) & status.ie) != 0;
}
// map the functions to the inline versions
#define arch_int_enable_interrupts() arch_int_enable_interrupts_inline()
#define arch_int_disable_interrupts() arch_int_disable_interrupts_inline()
#define arch_int_restore_interrupts(status) \
arch_int_restore_interrupts_inline(status)
#define arch_int_are_interrupts_enabled() \
arch_int_are_interrupts_enabled_inline()
enum {
kMSyscallSwitchToSmode = 0,
kMSyscallSetTimer = 1,
};
extern "C" status_t MSyscall(uint64 op, ...);
#endif
#endif /* _KERNEL_ARCH_RISCV64_INT_H */