a83a917d79
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8123 a95241bf-73f2-0310-859d-f6bbb57e9c96
96 lines
2.9 KiB
C
96 lines
2.9 KiB
C
/*******************************************************************************
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/
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/ File: AGP.h
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/
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/ Description: Interface to the AGP bus and driver.
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/ For more information, see "AGP interface specification", Revision 2.0 and 3.0,
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/ Intel Corporation, 1998-2002.
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/
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/ Rudolf Cornelissen 6/2004.
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/
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*******************************************************************************/
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#if !defined(_AGP_H_)
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#define _AGP_H_
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#include <Drivers.h>
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/* The API for driver access is C, not C++ */
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#ifdef __cplusplus
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extern "C" {
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#endif
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//driver IOCTRL argument:
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typedef struct {
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struct
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{
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ushort vendor_id, /* host bridge vendor id */
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device_id; /* host bridge device id */
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} dev;
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struct
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{
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uint32 agp_cap_id, /* AGP capability register as defined in the AGP standard */
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agp_stat, /* AGP STATUS register as defined in the AGP standard */
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agp_cmd; /* AGP COMMAND register as defined in the AGP standard */
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}config;
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status_t status; /* hostbridge usability status (B_OK if usable, B_ERROR if it
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* did not respond according to the AGP standard */
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} agp_info;
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//driver IOCTRL operation codes:
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enum
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{
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GET_CONFIG = B_DEVICE_OP_CODES_END+20001,
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SET_CONFIG,
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};
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/* ---
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value for the AGP_id field in the agp_cap_id register
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--- */
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#define AGP_id 0x02 /* AGP device identification */
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/* ---
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masks for capability ID register bits
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--- */
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#define AGP_id_mask 0x000000ff /* AGP capability identification, contains value 0x02 for AGP device */
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#define AGP_next_ptr 0x0000ff00 /* pointer to next item in PCI capabilities list, contains 0x00 if this is last item */
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#define AGP_next_ptr_shift 8
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#define AGP_rev_minor 0x000f0000 /* AGP Revision minor number reported */
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#define AGP_rev_minor_shift 16
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#define AGP_rev_major 0x00f00000 /* AGP Revision major number reported */
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#define AGP_rev_major_shift 20
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/* ---
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masks for status and command register bits
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--- */
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#define AGP_2_1x 0x00000001 /* AGP Revision 2.0 1x speed transfer mode */
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#define AGP_2_2x 0x00000002 /* AGP Revision 2.0 2x speed transfer mode */
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#define AGP_2_4x 0x00000004 /* AGP Revision 2.0 4x speed transfer mode */
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#define AGP_3_4x 0x00000001 /* AGP Revision 3.0 4x speed transfer mode */
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#define AGP_3_8x 0x00000002 /* AGP Revision 3.0 8x speed transfer mode */
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#define AGP_rates 0x00000007 /* mask for supported rates info */
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#define AGP_rate_rev 0x00000008 /* 0 if AGP Revision 2.0 or earlier rate scheme, 1 if AGP Revision 3.0 rate scheme */
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#define AGP_FW 0x00000010 /* 1 if fastwrite transfers supported */
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#define AGP_4G 0x00000020 /* 1 if adresses above 4G bytes supported */
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#define AGP_SBA 0x00000200 /* 1 if sideband adressing supported */
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#define AGP_RQ 0xff000000 /* max. number of enqueued AGP command requests supported, minus one */
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#define AGP_RQ_shift 24
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/* ---
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masks for command register bits
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--- */
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#define AGP_enable 0x00000100 /* set to 1 if AGP should be enabled */
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#ifdef __cplusplus
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}
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#endif
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#endif
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