305 lines
8.5 KiB
C
305 lines
8.5 KiB
C
/*===---- arm_acle.h - ARM Non-Neon intrinsics -----------------------------===
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*===-----------------------------------------------------------------------===
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*/
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#ifndef __ARM_ACLE_H
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#define __ARM_ACLE_H
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#ifndef __ARM_ACLE
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#error "ACLE intrinsics support not enabled."
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#endif
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#include <stdint.h>
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/* 8 SYNCHRONIZATION, BARRIER AND HINT INTRINSICS */
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/* 8.3 Memory barriers */
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#if !defined(_MSC_VER)
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#define __dmb(i) __builtin_arm_dmb(i)
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#define __dsb(i) __builtin_arm_dsb(i)
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#define __isb(i) __builtin_arm_isb(i)
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#endif
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/* 8.4 Hints */
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#if !defined(_MSC_VER)
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static __inline__ void __attribute__((__always_inline__, __nodebug__)) __wfi(void) {
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__builtin_arm_wfi();
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}
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static __inline__ void __attribute__((__always_inline__, __nodebug__)) __wfe(void) {
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__builtin_arm_wfe();
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}
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static __inline__ void __attribute__((__always_inline__, __nodebug__)) __sev(void) {
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__builtin_arm_sev();
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}
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static __inline__ void __attribute__((__always_inline__, __nodebug__)) __sevl(void) {
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__builtin_arm_sevl();
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}
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static __inline__ void __attribute__((__always_inline__, __nodebug__)) __yield(void) {
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__builtin_arm_yield();
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}
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#endif
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#if __ARM_32BIT_STATE
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#define __dbg(t) __builtin_arm_dbg(t)
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#endif
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/* 8.5 Swap */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__swp(uint32_t x, volatile uint32_t *p) {
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uint32_t v;
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do v = __builtin_arm_ldrex(p); while (__builtin_arm_strex(x, p));
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return v;
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}
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/* 8.6 Memory prefetch intrinsics */
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/* 8.6.1 Data prefetch */
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#define __pld(addr) __pldx(0, 0, 0, addr)
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#if __ARM_32BIT_STATE
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#define __pldx(access_kind, cache_level, retention_policy, addr) \
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__builtin_arm_prefetch(addr, access_kind, 1)
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#else
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#define __pldx(access_kind, cache_level, retention_policy, addr) \
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__builtin_arm_prefetch(addr, access_kind, cache_level, retention_policy, 1)
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#endif
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/* 8.6.2 Instruction prefetch */
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#define __pli(addr) __plix(0, 0, addr)
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#if __ARM_32BIT_STATE
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#define __plix(cache_level, retention_policy, addr) \
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__builtin_arm_prefetch(addr, 0, 0)
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#else
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#define __plix(cache_level, retention_policy, addr) \
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__builtin_arm_prefetch(addr, 0, cache_level, retention_policy, 0)
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#endif
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/* 8.7 NOP */
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static __inline__ void __attribute__((__always_inline__, __nodebug__)) __nop(void) {
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__builtin_arm_nop();
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}
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/* 9 DATA-PROCESSING INTRINSICS */
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/* 9.2 Miscellaneous data-processing intrinsics */
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/* ROR */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__ror(uint32_t x, uint32_t y) {
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y %= 32;
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if (y == 0) return x;
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return (x >> y) | (x << (32 - y));
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}
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__rorll(uint64_t x, uint32_t y) {
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y %= 64;
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if (y == 0) return x;
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return (x >> y) | (x << (64 - y));
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}
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static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
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__rorl(unsigned long x, uint32_t y) {
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#if __SIZEOF_LONG__ == 4
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return __ror(x, y);
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#else
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return __rorll(x, y);
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#endif
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}
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/* CLZ */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__clz(uint32_t t) {
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return __builtin_clz(t);
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}
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static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
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__clzl(unsigned long t) {
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return __builtin_clzl(t);
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}
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__clzll(uint64_t t) {
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return __builtin_clzll(t);
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}
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/* REV */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__rev(uint32_t t) {
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return __builtin_bswap32(t);
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}
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static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
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__revl(unsigned long t) {
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#if __SIZEOF_LONG__ == 4
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return __builtin_bswap32(t);
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#else
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return __builtin_bswap64(t);
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#endif
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}
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__revll(uint64_t t) {
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return __builtin_bswap64(t);
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}
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/* REV16 */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__rev16(uint32_t t) {
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return __ror(__rev(t), 16);
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}
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static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
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__rev16l(unsigned long t) {
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return __rorl(__revl(t), sizeof(long) / 2);
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}
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__rev16ll(uint64_t t) {
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return __rorll(__revll(t), 32);
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}
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/* REVSH */
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static __inline__ int16_t __attribute__((__always_inline__, __nodebug__))
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__revsh(int16_t t) {
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return __builtin_bswap16(t);
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}
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/* RBIT */
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__rbit(uint32_t t) {
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return __builtin_arm_rbit(t);
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}
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static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
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__rbitll(uint64_t t) {
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#if __ARM_32BIT_STATE
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return (((uint64_t) __builtin_arm_rbit(t)) << 32) |
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__builtin_arm_rbit(t >> 32);
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#else
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return __builtin_arm_rbit64(t);
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#endif
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}
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static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
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__rbitl(unsigned long t) {
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#if __SIZEOF_LONG__ == 4
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return __rbit(t);
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#else
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return __rbitll(t);
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#endif
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}
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/*
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* 9.4 Saturating intrinsics
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*
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* FIXME: Change guard to their corrosponding __ARM_FEATURE flag when Q flag
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* intrinsics are implemented and the flag is enabled.
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*/
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/* 9.4.1 Width-specified saturation intrinsics */
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#if __ARM_32BIT_STATE
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#define __ssat(x, y) __builtin_arm_ssat(x, y)
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#define __usat(x, y) __builtin_arm_usat(x, y)
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#endif
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/* 9.4.2 Saturating addition and subtraction intrinsics */
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#if __ARM_32BIT_STATE
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__qadd(int32_t t, int32_t v) {
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return __builtin_arm_qadd(t, v);
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}
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__qsub(int32_t t, int32_t v) {
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return __builtin_arm_qsub(t, v);
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}
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static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
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__qdbl(int32_t t) {
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return __builtin_arm_qadd(t, t);
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}
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#endif
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/* 9.7 CRC32 intrinsics */
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#if __ARM_FEATURE_CRC32
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__crc32b(uint32_t a, uint8_t b) {
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return __builtin_arm_crc32b(a, b);
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}
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__crc32h(uint32_t a, uint16_t b) {
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return __builtin_arm_crc32h(a, b);
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}
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__crc32w(uint32_t a, uint32_t b) {
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return __builtin_arm_crc32w(a, b);
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}
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__crc32d(uint32_t a, uint64_t b) {
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return __builtin_arm_crc32d(a, b);
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}
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__crc32cb(uint32_t a, uint8_t b) {
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return __builtin_arm_crc32cb(a, b);
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}
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__crc32ch(uint32_t a, uint16_t b) {
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return __builtin_arm_crc32ch(a, b);
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}
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__crc32cw(uint32_t a, uint32_t b) {
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return __builtin_arm_crc32cw(a, b);
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}
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static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
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__crc32cd(uint32_t a, uint64_t b) {
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return __builtin_arm_crc32cd(a, b);
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}
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#endif
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/* 10.1 Special register intrinsics */
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#define __arm_rsr(sysreg) __builtin_arm_rsr(sysreg)
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#define __arm_rsr64(sysreg) __builtin_arm_rsr64(sysreg)
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#define __arm_rsrp(sysreg) __builtin_arm_rsrp(sysreg)
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#define __arm_wsr(sysreg, v) __builtin_arm_wsr(sysreg, v)
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#define __arm_wsr64(sysreg, v) __builtin_arm_wsr64(sysreg, v)
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#define __arm_wsrp(sysreg, v) __builtin_arm_wsrp(sysreg, v)
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ARM_ACLE_H */
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