An effort was started some time ago to consolidate all internal
documentation in the git tree. However, this was just an accumulation of
files in various formats without any strucutre or way to browse it,
which results in no one even knowing that we have docs here.
This converts most of the files to restructuredtext and uses Sphinx to
generate an HTML browsable user manual (with a table of content and a
first attempt to put things in a global hierarchy).
There are almost no changes to the documentation content in this commit
(some obviously obsolete things were removed). The plan is to get the
toolchain up and running to make these docs easily available, and only
then see about improving the content. We can migrate some things off the
wiki and website, and rework the table of contents to have some more
hierarchy levels because currently it's a bit messy.
Change-Id: I924ac9dc6e753887ab56f18a09bdb0a1e1793bfd
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4370
Reviewed-by: Niels Sascha Reedijk <niels.reedijk@gmail.com>
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AGP (and PCI-express) Graphics Address Re-Mapping Table
=======================================================
The GART is an IO-MMU allowing the videocard and CPU to share some
memory. Either the CPU can access the video RAM directly (“aperture”),
or the video card can access the system RAM using DMA access.
The GART converts between physical addresses and virtual addresses on
the video card side. Of course, the CPU must then map these physical
addresses in its own address space to use them (using the MMU).
The GART works as you’d expect from an MMU. It has a page table (called
GTT) in RAM and walks it to figure out mappings. Since there cannot be
page misses (that would require exception handling on the GPU side),
access to missing pages are instead sent to a dedicated “scratch” page
which is not used for anything else.
Our driver implements the GART and GTT for Intel graphics card only, so
far. Since our videodrivers are only doing modesetting, they do not need
much support and other drivers implemented GTT management directly on
their own (it is usually enough to make the framebuffer accessible to
the CPU). However, this could be generalized into a more flexible iommu
bus protocol.
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