haiku/headers/private/kernel/arch/arm
David Karoly 83f755b5d8 kernel/arm: add memory barriers for page table ops
Introduce memory barriers according to ARMARM,
section G.5.3 TLB maintenance operations and barriers

Sequence for mapping memory in (both L1 and L2):
* DSB
* Invalidate i-cache (TODO)
* Insert new entry in page directory / page table
* DSB
* ISB

Sequence for mapping memory out:
* Remove page table entry
* DSB
* Invalidate TLB entry
* DSB
* ISB

Sequence for updating a page table entry:
* Update page table entry
* DSB
* Invalidate TLB entry
* Invalidate branch predictor (TODO)
* DSB
* ISB

Note: i-cache invalidation and branch predictor invalidation is
not implemented yet as this commit focuses on implementing memory
barriers.

Change-Id: I192fa80f6b43117236a4be6fa8c988afca90e015
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5241
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
2022-04-28 19:57:49 +00:00
..
arch_atomic.h
arch_cpu.h kernel/arm: add memory barriers for page table ops 2022-04-28 19:57:49 +00:00
arch_debug.h
arch_int.h
arch_kernel_args.h
arch_kernel.h
arch_system_info.h
arch_thread_types.h
arch_thread.h
arch_uart_8250_omap.h
arch_uart_pl011.h
arch_user_debugger.h
arch_vm_translation_map.h
arch_vm_types.h
arch_vm.h
arm920t.h
arm_mmu.h kernel/arm: implement memory attributes 2022-04-23 12:52:59 +00:00
bcm283X.h
omap3.h
pxa270.h
reg.h