8ca0f03d0c
* Working under qemu smp 1,2+ * Working on SiFive Unmatched * x86_64 efi not broken by smp_boot_other_cpus change Change-Id: I32ebc17913e46ed082be9ade8f56448bbf12f16e Reviewed-on: https://review.haiku-os.org/c/haiku/+/4705 Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org> Reviewed-by: Alex von Gluck IV <kallisti5@unixzen.com>
80 lines
1.1 KiB
C
80 lines
1.1 KiB
C
/*
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* Copyright 2003-2004, Axel Dörfler, axeld@pinc-software.de.
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* Copyright 2019, Adrien Destugues, pulkomandy@pulkomandy.tk.
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* Distributed under the terms of the MIT License.
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*/
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#ifndef _KERNEL_ARCH_RISCV64_CPU_H
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#define _KERNEL_ARCH_RISCV64_CPU_H
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#include <arch/riscv64/arch_thread_types.h>
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#include <arch_cpu_defs.h>
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#include <kernel.h>
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#define CPU_MAX_CACHE_LEVEL 8
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#define CACHE_LINE_SIZE 64
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static inline bool
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get_ac()
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{
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SstatusReg status(Sstatus());
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return status.sum != 0;
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}
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static inline void
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set_ac()
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{
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// TODO: Could be done atomically via CSRRS?
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SstatusReg status(Sstatus());
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status.sum = 1;
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SetSstatus(status.val);
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}
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static inline void
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clear_ac()
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{
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// TODO: Could be done atomically with CSRRC?
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SstatusReg status(Sstatus());
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status.sum = 0;
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SetSstatus(status.val);
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}
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typedef struct arch_cpu_info {
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uint64 hartId;
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} arch_cpu_info;
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#ifdef __cplusplus
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extern "C" {
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#endif
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void __riscv64_setup_system_time(uint64 conversionFactor);
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static inline void
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arch_cpu_pause(void)
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{
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// TODO: CPU pause
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}
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static inline void
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arch_cpu_idle(void)
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{
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Wfi();
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _KERNEL_ARCH_RISCV64_CPU_H */
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