09bb4e9ac5
substructure now (that's the only member actually). The system time offset is therefore accessed via architecture specific accessor functions. Note, that this commit breaks the PPC build. Since I want to rename at least one file I've already changed, I can't avoid that. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15835 a95241bf-73f2-0310-859d-f6bbb57e9c96
194 lines
4.5 KiB
C
194 lines
4.5 KiB
C
/*
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* Copyright 2002-2005, Axel Dörfler, axeld@pinc-software.de. All rights reserved.
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* Distributed under the terms of the MIT License.
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*
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* Copyright 2001-2002, Travis Geiselbrecht. All rights reserved.
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* Distributed under the terms of the NewOS License.
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*/
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#ifndef _KERNEL_ARCH_x86_CPU_H
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#define _KERNEL_ARCH_x86_CPU_H
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#include <module.h>
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#include <arch/x86/descriptors.h>
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// MSR registers (possibly Intel specific)
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#define IA32_MSR_APIC_BASE 0x1b
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#define IA32_MSR_MTRR_CAPABILITIES 0xfe
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#define IA32_MSR_MTRR_DEFAULT_TYPE 0x2ff
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#define IA32_MSR_MTRR_PHYSICAL_BASE_0 0x200
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#define IA32_MSR_MTRR_PHYSICAL_MASK_0 0x201
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// cpuid eax 1 features
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#define IA32_FEATURE_MTRR (1UL << 12)
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#define IA32_FEATURE_GLOBAL_PAGES (1UL << 13)
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// cr4 flags
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#define IA32_CR4_GLOBAL_PAGES (1UL << 7)
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// Memory type ranges
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#define IA32_MTR_UNCACHED 0
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#define IA32_MTR_WRITE_COMBINING 1
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#define IA32_MTR_WRITE_THROUGH 4
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#define IA32_MTR_WRITE_PROTECTED 5
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#define IA32_MTR_WRITE_BACK 6
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typedef struct x86_cpu_module_info {
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module_info info;
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uint32 (*count_mtrrs)(void);
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void (*init_mtrrs)(void);
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void (*set_mtrr)(uint32 index, uint64 base, uint64 length, uint8 type);
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status_t (*get_mtrr)(uint32 index, uint64 *_base, uint64 *_length,
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uint8 *_type);
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} x86_cpu_module_info;
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struct tss {
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uint16 prev_task;
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uint16 unused0;
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uint32 sp0;
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uint32 ss0;
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uint32 sp1;
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uint32 ss1;
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uint32 sp2;
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uint32 ss2;
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uint32 cr3;
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uint32 eip, eflags, eax, ecx, edx, ebx, esp, ebp, esi, edi;
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uint32 es, cs, ss, ds, fs, gs;
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uint32 ldt_seg_selector;
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uint16 unused1;
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uint16 io_map_base;
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};
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struct iframe {
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uint32 gs;
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uint32 fs;
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uint32 es;
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uint32 ds;
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uint32 edi;
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uint32 esi;
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uint32 ebp;
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uint32 esp;
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uint32 ebx;
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uint32 edx;
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uint32 ecx;
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uint32 eax;
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uint32 orig_eax;
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uint32 orig_edx;
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uint32 vector;
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uint32 error_code;
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uint32 eip;
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uint32 cs;
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uint32 flags;
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uint32 user_esp;
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uint32 user_ss;
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};
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define nop() __asm__ ("nop"::)
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struct arch_thread;
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void __x86_setup_system_time(uint32 cv_factor);
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void i386_context_switch(struct arch_thread *old_state, struct arch_thread *new_state, addr_t new_pgdir);
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void i386_enter_uspace(addr_t entry, void *args1, void *args2, addr_t ustack_top);
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void i386_set_tss_and_kstack(addr_t kstack);
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void i386_switch_stack_and_call(addr_t stack, void (*func)(void *), void *arg);
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void i386_swap_pgdir(addr_t new_pgdir);
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void i386_fsave(void *fpu_state);
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void i386_fxsave(void *fpu_state);
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void i386_frstor(const void *fpu_state);
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void i386_fxrstor(const void *fpu_state);
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void i386_fsave_swap(void *old_fpu_state, const void *new_fpu_state);
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void i386_fxsave_swap(void *old_fpu_state, const void *new_fpu_state);
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uint32 x86_read_ebp();
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uint32 x86_read_cr0();
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void x86_write_cr0(uint32 value);
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uint32 x86_read_cr4();
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void x86_write_cr4(uint32 value);
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uint64 x86_read_msr(uint32 registerNumber);
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void x86_write_msr(uint32 registerNumber, uint64 value);
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void x86_set_task_gate(int32 n, int32 segment);
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uint32 x86_count_mtrrs(void);
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void x86_set_mtrr(uint32 index, uint64 base, uint64 length, uint8 type);
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status_t x86_get_mtrr(uint32 index, uint64 *_base, uint64 *_length, uint8 *_type);
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struct tss *x86_get_main_tss(void);
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#define read_cr3(value) \
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__asm__("movl %%cr3,%0" : "=r" (value))
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#define write_cr3(value) \
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__asm__("movl %0,%%cr3" : : "r" (value))
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#define read_dr3(value) \
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__asm__("movl %%dr3,%0" : "=r" (value))
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#define write_dr3(value) \
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__asm__("movl %0,%%dr3" : : "r" (value))
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#define invalidate_TLB(va) \
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__asm__("invlpg (%0)" : : "r" (va))
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#define wbinvd() \
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__asm__("wbinvd")
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#define out8(value,port) \
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__asm__ ("outb %%al,%%dx" : : "a" (value), "d" (port))
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#define out16(value,port) \
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__asm__ ("outw %%ax,%%dx" : : "a" (value), "d" (port))
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#define out32(value,port) \
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__asm__ ("outl %%eax,%%dx" : : "a" (value), "d" (port))
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#define in8(port) ({ \
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uint8 _v; \
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__asm__ volatile ("inb %%dx,%%al" : "=a" (_v) : "d" (port)); \
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_v; \
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})
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#define in16(port) ({ \
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uint16 _v; \
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__asm__ volatile ("inw %%dx,%%ax":"=a" (_v) : "d" (port)); \
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_v; \
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})
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#define in32(port) ({ \
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uint32 _v; \
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__asm__ volatile ("inl %%dx,%%eax":"=a" (_v) : "d" (port)); \
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_v; \
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})
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#define out8_p(value,port) \
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__asm__ ("outb %%al,%%dx\n" \
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"\tjmp 1f\n" \
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"1:\tjmp 1f\n" \
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"1:" : : "a" (value), "d" (port))
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#define in8_p(port) ({ \
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uint8 _v; \
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__asm__ volatile ("inb %%dx,%%al\n" \
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"\tjmp 1f\n" \
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"1:\tjmp 1f\n" \
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"1:" : "=a" (_v) : "d" (port)); \
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_v; \
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})
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extern segment_descriptor *gGDT;
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#ifdef __cplusplus
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} // extern "C" {
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#endif
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#endif /* _KERNEL_ARCH_x86_CPU_H */
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