45 lines
1.3 KiB
C
45 lines
1.3 KiB
C
/*
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Copyright (c) 2002, Thomas Kurschel
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Part of Radeon driver
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Basic PLL registers access
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*/
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#ifndef _PLL_ACCESS_H
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#define _PLL_ACCESS_H
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#include "mmio.h"
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// to be called after each CLOCK_CNTL_INDEX access;
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// all functions declared in this header take care of that
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// (hardware bug fix suggested by XFree86)
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void RADEONPllErrataAfterIndex( vuint8 *regs, radeon_type asic );
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// to be called after each CLOCK_CNTL_DATA access;
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// all functions declared in this header take care of that
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// (hardware bug fix suggested by XFree86)
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void RADEONPllErrataAfterData( vuint8 *regs, radeon_type asic );
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// in general:
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// - the PLL is connected via special port
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// - you need first to choose the PLL register and then write/read its value
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//
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// if atomic updates are not safe we:
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// - verify each time whether the right register is chosen
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// - verify all values written to PLL-registers
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// read value "val" from PLL-register "addr"
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uint32 Radeon_INPLL( vuint8 *regs, radeon_type asic, int addr );
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// write value "val" to PLL-register "addr"
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void Radeon_OUTPLL( vuint8 *regs, radeon_type asic, uint8 addr, uint32 val );
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// write "val" to PLL-register "addr" keeping bits "mask"
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void Radeon_OUTPLLP( vuint8 *regs, radeon_type asic, uint8 addr, uint32 val, uint32 mask );
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#endif
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