b6f76ebe71
Fixes #8681.
127 lines
3.4 KiB
C
127 lines
3.4 KiB
C
/*
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** Copyright 2003, Axel Dörfler, axeld@pinc-software.de. All rights reserved.
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** Distributed under the terms of the MIT License.
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*/
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#ifndef _KERNEL_ARCH_M68K_MMU_H
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#define _KERNEL_ARCH_M68K_MMU_H
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#include <SupportDefs.h>
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#include <string.h>
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/*
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* cf.
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* "mc68030 Enhanced 32-bit Microprocessor User's Manual"
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* (3rd edition), Section 9
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* "mc68040 Enhanced 32-bit Microprocessor User's Manual"
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* Section 9
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*
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* The 030 pmmu can support up to 6-level translation tree,
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* each level using an size-selectable index from the
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* virtual address, short (4-bit) and long (8-bit) page table
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* and page entry descriptors, early tree termination, and selectable
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* page size from 256 bytes to 32K.
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* There is optionally a separate Supervisor Root Pointer to separate
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* the user and kernel trees.
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*
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* The 040 pmmu however is way more limited in its abilities.
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* It has a fixed 3-level page tree, with 7/7/6 bit splitting for
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* 4K pages. The opcodes are also different so we will need specific
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* routines. Both supervisor and root pointers must be used so we can't
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* reuse one of them.
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*
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*
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* We settle to:
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* - 1 bit index for the first level to easily split kernel and user
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* part of the tree, with the possibility to force supervisor only for
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* the kernel tree. The use of SRP to point to a 2nd tree is avoided as
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* it is not available on 68060, plus that makes a spare 64bit reg to
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* stuff things in.
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* - 9 bit page directory
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* - 10 bit page tables
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* - 12 bit page index (4K pages, a common value).
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*/
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enum descriptor_types {
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DT_INVALID = 0, // invalid entry
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DT_PAGE, // page descriptor
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DT_VALID_4, // short page table descriptor
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DT_VALID_8, // long page table descriptor
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};
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#define M68K_PE_DT_MASK 0x00000003
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#define DT_MASK M68K_PE_DT_MASK
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#if 0
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/* This is the normal layout of the descriptors, as per documentation.
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* When page size > 256, several bits are unused in the LSB of page
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* addresses, which we can use in addition of other unused bits.
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* the structs dedlared later reflect this for 4K pages.
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*/
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struct short_page_directory_entry {
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// upper 32 bits
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uint32 type : 2;
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uint32 write_protect : 1;
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uint32 used : 1;
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uint32 address : 28;
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};
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struct long_page_directory_entry {
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// upper 32 bits
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uint32 type : 2;
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uint32 write_protect : 1;
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uint32 used : 1;
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uint32 _zero1 : 4;
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uint32 supervisor : 1;
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uint32 _zero2 : 1;
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uint32 _ones : 6;
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uint32 limit : 15;
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uint32 low_up : 1; // limit is lower(1)/upper(0)
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// lower 32 bits
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uint32 unused : 4; //
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uint32 address : 28;
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};
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struct short_page_table_entry {
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uint32 type : 2;
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uint32 write_protect : 1;
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uint32 used : 1;
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uint32 modified : 1;
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uint32 _zero1 : 1;
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uint32 cache_inhibit : 1;
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uint32 _zero2 : 1;
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uint32 address : 24;
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};
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struct long_page_table_entry {
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// upper 32 bits
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uint32 type : 2;
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uint32 write_protect : 1;
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uint32 used : 1;
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uint32 modified : 1;
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uint32 _zero1 : 1;
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uint32 cache_inhibit : 1;
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uint32 _zero2 : 1;
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uint32 supervisor : 1;
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uint32 _zero3 : 1;
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uint32 _ones : 6;
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// limit only used on early table terminators, else unused
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uint32 limit : 15;
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uint32 low_up : 1; // limit is lower(1)/upper(0)
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// lower 32 bits
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uint32 unused : 8; //
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uint32 address : 24;
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};
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#endif
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/* ppc
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extern void m68k_get_page_table(page_table_entry_group **_pageTable, size_t *_size);
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extern void m68k_set_page_table(page_table_entry_group *pageTable, size_t size);
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*/
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#endif /* _KERNEL_ARCH_M68K_MMU_H */
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