f8af317470
* This puts the registers in a better state and ensures all model dependant defines are prefixed with card series * Consolidate evergreen defines into single header
281 lines
12 KiB
C
281 lines
12 KiB
C
/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#ifndef __R500_REG_H__
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#define __R500_REG_H__
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/* pipe config regs */
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#define R300_GA_POLY_MODE 0x4288
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# define R300_FRONT_PTYPE_POINT (0 << 4)
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# define R300_FRONT_PTYPE_LINE (1 << 4)
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# define R300_FRONT_PTYPE_TRIANGE (2 << 4)
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# define R300_BACK_PTYPE_POINT (0 << 7)
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# define R300_BACK_PTYPE_LINE (1 << 7)
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# define R300_BACK_PTYPE_TRIANGE (2 << 7)
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#define R300_GA_ROUND_MODE 0x428c
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# define R300_GEOMETRY_ROUND_TRUNC (0 << 0)
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# define R300_GEOMETRY_ROUND_NEAREST (1 << 0)
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# define R300_COLOR_ROUND_TRUNC (0 << 2)
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# define R300_COLOR_ROUND_NEAREST (1 << 2)
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#define R300_GB_MSPOS0 0x4010
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# define R300_MS_X0_SHIFT 0
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# define R300_MS_Y0_SHIFT 4
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# define R300_MS_X1_SHIFT 8
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# define R300_MS_Y1_SHIFT 12
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# define R300_MS_X2_SHIFT 16
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# define R300_MS_Y2_SHIFT 20
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# define R300_MSBD0_Y_SHIFT 24
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# define R300_MSBD0_X_SHIFT 28
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#define R300_GB_MSPOS1 0x4014
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# define R300_MS_X3_SHIFT 0
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# define R300_MS_Y3_SHIFT 4
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# define R300_MS_X4_SHIFT 8
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# define R300_MS_Y4_SHIFT 12
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# define R300_MS_X5_SHIFT 16
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# define R300_MS_Y5_SHIFT 20
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# define R300_MSBD1_SHIFT 24
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#define R300_GA_ENHANCE 0x4274
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# define R300_GA_DEADLOCK_CNTL (1 << 0)
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# define R300_GA_FASTSYNC_CNTL (1 << 1)
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#define R300_RB3D_DSTCACHE_CTLSTAT 0x4e4c
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# define R300_RB3D_DC_FLUSH (2 << 0)
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# define R300_RB3D_DC_FREE (2 << 2)
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# define R300_RB3D_DC_FINISH (1 << 4)
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#define R300_RB3D_ZCACHE_CTLSTAT 0x4f18
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# define R300_ZC_FLUSH (1 << 0)
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# define R300_ZC_FREE (1 << 1)
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# define R300_ZC_FLUSH_ALL 0x3
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#define R400_GB_PIPE_SELECT 0x402c
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#define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */
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#define R500_SU_REG_DEST 0x42c8
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#define R300_GB_TILE_CONFIG 0x4018
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# define R300_ENABLE_TILING (1 << 0)
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# define R300_PIPE_COUNT_RV350 (0 << 1)
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# define R300_PIPE_COUNT_R300 (3 << 1)
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# define R300_PIPE_COUNT_R420_3P (6 << 1)
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# define R300_PIPE_COUNT_R420 (7 << 1)
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# define R300_TILE_SIZE_8 (0 << 4)
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# define R300_TILE_SIZE_16 (1 << 4)
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# define R300_TILE_SIZE_32 (2 << 4)
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# define R300_SUBPIXEL_1_12 (0 << 16)
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# define R300_SUBPIXEL_1_16 (1 << 16)
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#define R300_DST_PIPE_CONFIG 0x170c
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# define R300_PIPE_AUTO_CONFIG (1 << 31)
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#define R300_RB2D_DSTCACHE_MODE 0x3428
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# define R300_DC_AUTOFLUSH_ENABLE (1 << 8)
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# define R300_DC_DC_DISABLE_IGNORE_PE (1 << 17)
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#define RADEON_CP_STAT 0x7C0
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#define RADEON_RBBM_CMDFIFO_ADDR 0xE70
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#define RADEON_RBBM_CMDFIFO_DATA 0xE74
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#define RADEON_ISYNC_CNTL 0x1724
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# define RADEON_ISYNC_ANY2D_IDLE3D (1 << 0)
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# define RADEON_ISYNC_ANY3D_IDLE2D (1 << 1)
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# define RADEON_ISYNC_TRIG2D_IDLE3D (1 << 2)
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# define RADEON_ISYNC_TRIG3D_IDLE2D (1 << 3)
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# define RADEON_ISYNC_WAIT_IDLEGUI (1 << 4)
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# define RADEON_ISYNC_CPSCRATCH_IDLEGUI (1 << 5)
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#define RS480_NB_MC_INDEX 0x168
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# define RS480_NB_MC_IND_WR_EN (1 << 8)
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#define RS480_NB_MC_DATA 0x16c
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/*
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* RS690
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*/
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#define RS690_MCCFG_FB_LOCATION 0x100
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#define RS690_MC_FB_START_MASK 0x0000FFFF
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#define RS690_MC_FB_START_SHIFT 0
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#define RS690_MC_FB_TOP_MASK 0xFFFF0000
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#define RS690_MC_FB_TOP_SHIFT 16
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#define RS690_MCCFG_AGP_LOCATION 0x101
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#define RS690_MC_AGP_START_MASK 0x0000FFFF
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#define RS690_MC_AGP_START_SHIFT 0
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#define RS690_MC_AGP_TOP_MASK 0xFFFF0000
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#define RS690_MC_AGP_TOP_SHIFT 16
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#define RS690_MCCFG_AGP_BASE 0x102
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#define RS690_MCCFG_AGP_BASE_2 0x103
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#define RS690_MC_INIT_MISC_LAT_TIMER 0x104
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#define RS690_HDP_FB_LOCATION 0x0134
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#define RS690_MC_INDEX 0x78
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# define RS690_MC_INDEX_MASK 0x1ff
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# define RS690_MC_INDEX_WR_EN (1 << 9)
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# define RS690_MC_INDEX_WR_ACK 0x7f
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#define RS690_MC_DATA 0x7c
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#define RS690_MC_STATUS 0x90
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#define RS690_MC_STATUS_IDLE (1 << 0)
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#define RS480_AGP_BASE_2 0x0164
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#define RS480_MC_MISC_CNTL 0x18
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# define RS480_DISABLE_GTW (1 << 1)
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# define RS480_GART_INDEX_REG_EN (1 << 12)
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# define RS690_BLOCK_GFX_D3_EN (1 << 14)
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#define RS480_GART_FEATURE_ID 0x2b
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# define RS480_HANG_EN (1 << 11)
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# define RS480_TLB_ENABLE (1 << 18)
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# define RS480_P2P_ENABLE (1 << 19)
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# define RS480_GTW_LAC_EN (1 << 25)
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# define RS480_2LEVEL_GART (0 << 30)
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# define RS480_1LEVEL_GART (1 << 30)
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# define RS480_PDC_EN (1 << 31)
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#define RS480_GART_BASE 0x2c
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#define RS480_GART_CACHE_CNTRL 0x2e
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# define RS480_GART_CACHE_INVALIDATE (1 << 0) /* wait for it to clear */
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#define RS480_AGP_ADDRESS_SPACE_SIZE 0x38
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# define RS480_GART_EN (1 << 0)
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# define RS480_VA_SIZE_32MB (0 << 1)
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# define RS480_VA_SIZE_64MB (1 << 1)
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# define RS480_VA_SIZE_128MB (2 << 1)
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# define RS480_VA_SIZE_256MB (3 << 1)
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# define RS480_VA_SIZE_512MB (4 << 1)
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# define RS480_VA_SIZE_1GB (5 << 1)
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# define RS480_VA_SIZE_2GB (6 << 1)
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#define RS480_AGP_MODE_CNTL 0x39
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# define RS480_POST_GART_Q_SIZE (1 << 18)
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# define RS480_NONGART_SNOOP (1 << 19)
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# define RS480_AGP_RD_BUF_SIZE (1 << 20)
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# define RS480_REQ_TYPE_SNOOP_SHIFT 22
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# define RS480_REQ_TYPE_SNOOP_MASK 0x3
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# define RS480_REQ_TYPE_SNOOP_DIS (1 << 24)
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#define RS690_AIC_CTRL_SCRATCH 0x3A
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# define RS690_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1)
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/*
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* RS600
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*/
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#define RS600_MC_STATUS 0x0
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#define RS600_MC_STATUS_IDLE (1 << 0)
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#define RS600_MC_INDEX 0x70
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# define RS600_MC_ADDR_MASK 0xffff
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# define RS600_MC_IND_SEQ_RBS_0 (1 << 16)
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# define RS600_MC_IND_SEQ_RBS_1 (1 << 17)
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# define RS600_MC_IND_SEQ_RBS_2 (1 << 18)
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# define RS600_MC_IND_SEQ_RBS_3 (1 << 19)
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# define RS600_MC_IND_AIC_RBS (1 << 20)
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# define RS600_MC_IND_CITF_ARB0 (1 << 21)
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# define RS600_MC_IND_CITF_ARB1 (1 << 22)
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# define RS600_MC_IND_WR_EN (1 << 23)
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#define RS600_MC_DATA 0x74
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#define RS600_MC_STATUS 0x0
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# define RS600_MC_IDLE (1 << 1)
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#define RS600_MC_FB_LOCATION 0x4
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#define RS600_MC_FB_START_MASK 0x0000FFFF
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#define RS600_MC_FB_START_SHIFT 0
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#define RS600_MC_FB_TOP_MASK 0xFFFF0000
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#define RS600_MC_FB_TOP_SHIFT 16
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#define RS600_MC_AGP_LOCATION 0x5
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#define RS600_MC_AGP_START_MASK 0x0000FFFF
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#define RS600_MC_AGP_START_SHIFT 0
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#define RS600_MC_AGP_TOP_MASK 0xFFFF0000
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#define RS600_MC_AGP_TOP_SHIFT 16
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#define RS600_MC_AGP_BASE 0x6
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#define RS600_MC_AGP_BASE_2 0x7
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#define RS600_MC_CNTL1 0x9
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# define RS600_ENABLE_PAGE_TABLES (1 << 26)
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#define RS600_MC_PT0_CNTL 0x100
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# define RS600_ENABLE_PT (1 << 0)
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# define RS600_EFFECTIVE_L2_CACHE_SIZE(x) ((x) << 15)
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# define RS600_EFFECTIVE_L2_QUEUE_SIZE(x) ((x) << 21)
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# define RS600_INVALIDATE_ALL_L1_TLBS (1 << 28)
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# define RS600_INVALIDATE_L2_CACHE (1 << 29)
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#define RS600_MC_PT0_CONTEXT0_CNTL 0x102
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# define RS600_ENABLE_PAGE_TABLE (1 << 0)
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# define RS600_PAGE_TABLE_TYPE_FLAT (0 << 1)
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#define RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR 0x112
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#define RS600_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR 0x114
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#define RS600_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR 0x11c
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#define RS600_MC_PT0_CONTEXT0_FLAT_BASE_ADDR 0x12c
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#define RS600_MC_PT0_CONTEXT0_FLAT_START_ADDR 0x13c
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#define RS600_MC_PT0_CONTEXT0_FLAT_END_ADDR 0x14c
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#define RS600_MC_PT0_CLIENT0_CNTL 0x16c
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# define RS600_ENABLE_TRANSLATION_MODE_OVERRIDE (1 << 0)
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# define RS600_TRANSLATION_MODE_OVERRIDE (1 << 1)
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# define RS600_SYSTEM_ACCESS_MODE_MASK (3 << 8)
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# define RS600_SYSTEM_ACCESS_MODE_PA_ONLY (0 << 8)
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# define RS600_SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 8)
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# define RS600_SYSTEM_ACCESS_MODE_IN_SYS (2 << 8)
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# define RS600_SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 8)
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# define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASSTHROUGH (0 << 10)
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# define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE (1 << 10)
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# define RS600_EFFECTIVE_L1_CACHE_SIZE(x) ((x) << 11)
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# define RS600_ENABLE_FRAGMENT_PROCESSING (1 << 14)
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# define RS600_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 15)
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# define RS600_INVALIDATE_L1_TLB (1 << 20)
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/* rs600/rs690/rs740 */
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# define RS600_BUS_MASTER_DIS (1 << 14)
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# define RS600_MSI_REARM (1 << 20)
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/* see RS400_MSI_REARM in AIC_CNTL for rs480 */
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#define RV515_MC_FB_LOCATION 0x01
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#define RV515_MC_FB_START_MASK 0x0000FFFF
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#define RV515_MC_FB_START_SHIFT 0
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#define RV515_MC_FB_TOP_MASK 0xFFFF0000
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#define RV515_MC_FB_TOP_SHIFT 16
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#define RV515_MC_AGP_LOCATION 0x02
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#define RV515_MC_AGP_START_MASK 0x0000FFFF
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#define RV515_MC_AGP_START_SHIFT 0
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#define RV515_MC_AGP_TOP_MASK 0xFFFF0000
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#define RV515_MC_AGP_TOP_SHIFT 16
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#define RV515_MC_AGP_BASE 0x03
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#define RV515_MC_AGP_BASE_2 0x04
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#define R520_MC_FB_LOCATION 0x04
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#define R520_MC_FB_START_MASK 0x0000FFFF
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#define R520_MC_FB_START_SHIFT 0
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#define R520_MC_FB_TOP_MASK 0xFFFF0000
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#define R520_MC_FB_TOP_SHIFT 16
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#define R520_MC_AGP_LOCATION 0x05
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#define R520_MC_AGP_START_MASK 0x0000FFFF
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#define R520_MC_AGP_START_SHIFT 0
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#define R520_MC_AGP_TOP_MASK 0xFFFF0000
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#define R520_MC_AGP_TOP_SHIFT 16
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#define R520_MC_AGP_BASE 0x06
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#define R520_MC_AGP_BASE_2 0x07
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#define R520_MC_STATUS 0x00
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#define R520_MC_STATUS_IDLE (1<<1)
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#define RV515_MC_STATUS 0x08
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#define RV515_MC_STATUS_IDLE (1<<4)
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#define RV515_MC_INIT_MISC_LAT_TIMER 0x09
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#define R520_MC_IND_INDEX 0x70
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#define R520_MC_IND_WR_EN (1 << 24)
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#define R520_MC_IND_DATA 0x74
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#define RV515_MC_CNTL 0x5
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# define RV515_MEM_NUM_CHANNELS_MASK 0x3
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#define R520_MC_CNTL0 0x8
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# define R520_MEM_NUM_CHANNELS_MASK (0x3 << 24)
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# define R520_MEM_NUM_CHANNELS_SHIFT 24
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# define R520_MC_CHANNEL_SIZE (1 << 23)
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#endif |