1deda8e758
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22254 a95241bf-73f2-0310-859d-f6bbb57e9c96
312 lines
12 KiB
C
312 lines
12 KiB
C
/*
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definitions for used nVidia acceleration engine commands.
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Written by Rudolf Cornelissen 12/2004-12/2005
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*/
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#ifndef NV_ACC_H
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#define NV_ACC_H
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typedef struct {
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uint32 reserved00[0x0004];
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uint16 FifoFree; /* little endian (FIFO internal register) */
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uint16 Nop; /* little endian (FIFO internal register) */
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uint32 reserved01[0x000b];
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uint32 DMAPut; /* b2-28 is DMA Put offset (FIFO internal register) */
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uint32 DMAGet; /* b2-28 is DMA Get offset (FIFO internal register) */
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uint32 reserved02[0x00ae];
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uint32 SetRop5; /* b0-7 is ROP5 */
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} cmd_nv_rop5_solid;
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typedef struct {
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uint32 reserved00[0x0004];
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uint16 FifoFree; /* little endian (FIFO internal register) */
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uint16 Nop; /* little endian (FIFO internal register) */
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uint32 reserved01[0x000b];
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uint32 DMAPut; /* b2-28 is DMA Put offset (FIFO internal register) */
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uint32 DMAGet; /* b2-28 is DMA Get offset (FIFO internal register) */
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uint32 reserved02[0x00ae];
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uint32 TopLeft; /* b0-15 is left, b16-31 is top */
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uint32 HeightWidth; /* b0-15 is width, b16-31 is height */
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} cmd_nv_image_black_rectangle;
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typedef struct {
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uint32 reserved00[0x0004];
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uint16 FifoFree; /* little endian (FIFO internal register) */
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uint16 Nop; /* little endian (FIFO internal register) */
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uint32 reserved01[0x000b];
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uint32 DMAPut; /* b2-28 is DMA Put offset (FIFO internal register) */
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uint32 DMAGet; /* b2-28 is DMA Get offset (FIFO internal register) */
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uint32 reserved02[0x00ae];
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uint32 SetColorFormat; /* colorspace */
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uint32 reserved03[0x0001];
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uint32 SetShape; /* b0-1: %00 = 8X_8Y; %01 = 64X_1Y; %10 = 1X_64Y */
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uint32 reserved04[0x0001];
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uint32 SetColor0; /* b0-31 is color */
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uint32 SetColor1; /* b0-31 is color */
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uint32 SetPattern[0x0002]; /* b0-31 is bitmap */
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} cmd_nv_image_pattern;
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typedef struct {
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uint32 reserved00[0x0004];
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uint16 FifoFree; /* little endian (FIFO internal register) */
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uint16 Nop; /* little endian (FIFO internal register) */
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uint32 reserved01[0x000b];
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uint32 DMAPut; /* b2-28 is DMA Put offset (FIFO internal register) */
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uint32 DMAGet; /* b2-28 is DMA Get offset (FIFO internal register) */
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uint32 reserved02[0x00ae];
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uint32 SourceOrg; /* b0-15 is X, b16-31 is Y */
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uint32 DestOrg; /* b0-15 is X, b16-31 is Y */
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uint32 HeightWidth; /* b0-15 is width, b16-31 is height */
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} cmd_nv_image_blit;
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//fixme: using nv4_gdi_rectangle_text for DMA acc. Differs slightly from this one!
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//WARNING: nv4_gdi_rectangle_text can only do 32 unclipped rects at once!
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typedef struct {
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uint32 reserved00[0x0004];
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uint16 FifoFree; /* little endian (FIFO internal register) */
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uint16 Nop; /* little endian (FIFO internal register) */
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uint32 reserved01[0x000b];
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uint32 DMAPut; /* b2-28 is DMA Put offset (FIFO internal register) */
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uint32 DMAGet; /* b2-28 is DMA Get offset (FIFO internal register) */
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uint32 reserved02[0x00ae];
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uint32 SetColorFormat; /* colorspace */
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uint32 reserved03[0x003e];
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uint32 Color1A; /* b0-31 is color */
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struct {
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uint32 LeftTop; /* b0-15 is top, b16-31 is left */
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uint32 WidthHeight; /* b0-15 is height, b16-31 is width */
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} UnclippedRectangle[0x40]; /* command can handle upto 64 unclipped rects */
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/* fixme: XFree also defines the registers below:
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* (used for the 2D 'ScanlineCPUToScreenColorExpandFill' and 'ColorExpandScanline'
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* functions.)
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* We don't use this currently. */
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/*
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U032 reserved04[(0x080)-3];
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struct
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{
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U032 TopLeft;
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U032 BottomRight;
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} ClipB;
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U032 Color1B;
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struct
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{
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U032 TopLeft;
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U032 BottomRight;
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} ClippedRectangle[64];
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U032 reserved05[(0x080)-5];
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struct
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{
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U032 TopLeft;
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U032 BottomRight;
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} ClipC;
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U032 Color1C;
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U032 WidthHeightC;
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U032 PointC;
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U032 MonochromeData1C;
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U032 reserved06[(0x080)+121];
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struct
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{
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U032 TopLeft;
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U032 BottomRight;
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} ClipD;
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U032 Color1D;
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U032 WidthHeightInD;
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U032 WidthHeightOutD;
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U032 PointD;
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U032 MonochromeData1D;
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U032 reserved07[(0x080)+120];
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struct
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{
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U032 TopLeft;
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U032 BottomRight;
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} ClipE;
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U032 Color0E;
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U032 Color1E;
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U032 WidthHeightInE;
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U032 WidthHeightOutE;
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U032 PointE;
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U032 MonochromeData01E;
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*/
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} cmd_nv3_gdi_rectangle_text;
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/* This command could (at least) potentially speed-up our fill_span command... :-) */
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//fixme: test this 2D command!
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typedef struct {
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uint32 reserved00[0x0004];
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uint16 FifoFree; /* little endian (FIFO internal register) */
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uint16 Nop; /* little endian (FIFO internal register) */
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uint32 reserved01[0x000b];
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uint32 DMAPut; /* b2-28 is DMA Put offset (FIFO internal register) */
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uint32 DMAGet; /* b2-28 is DMA Get offset (FIFO internal register) */
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uint32 reserved02[0x00af];
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uint32 Color; /* b0-31 is color */
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uint32 reserved03[0x003e];
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struct {
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uint32 Point0; /* b0-15 is X, b16-31 is Y: starting coordinate */
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uint32 Point1; /* b0-15 is X, b16-31 is Y: ending coordinate */
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} Line[0x10]; /* command can handle upto 16 lines */
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struct {
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uint32 Point0X; /* b0-31 is X: starting coordinate */
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uint32 Point0Y; /* b0-31 is Y: starting coordinate */
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uint32 Point1X; /* b0-31 is X: ending coordinate */
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uint32 Point1Y; /* b0-31 is Y: ending coordinate */
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} Line32[0x08]; /* cmd can handle upto 8 lines with 32-bit coordinates */
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struct {
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uint32 Point; /* b0-15 is X, b16-31 is Y */
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} Polyline[0x20]; /* cmd can handle upto 32 points polylines */
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struct {
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uint32 PointX; /* b0-31 is X */
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uint32 PointY; /* b0-31 is Y */
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} Polyline32[0x10]; /* cmd can handle upto 16 point polylines with 32-bit coord's */
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struct {
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uint32 Color; /* b0-31 is color */
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uint32 Point; /* b0-15 is X, b16-31 is Y */
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} ColorPolyline[0x10]; /* cmd can handle upto 16 point polylines with individually
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* colored sections */
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} cmd_nv1_render_solid_lin;
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/* Someone defined this in XFree once (as 'RivaRectangle') but never used it:
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* a handle should also be defined in the engine's init code, which was never done AFAIK.
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* The command could be very interesting for us, as it could potentially speed-up our
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* rectangle_fills :-) */
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//fixme: test this 2D command!
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typedef struct {
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uint32 reserved00[0x0004];
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uint16 FifoFree; /* little endian (FIFO internal register) */
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uint16 Nop; /* little endian (FIFO internal register) */
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uint32 reserved01[0x000b];
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uint32 DMAPut; /* b2-28 is DMA Put offset (FIFO internal register) */
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uint32 DMAGet; /* b2-28 is DMA Get offset (FIFO internal register) */
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uint32 reserved02[0x00af];
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uint32 Color; /* b0-31 is color */
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uint32 reserved03[0x003e];
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struct {
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uint32 TopLeft; /* b0-15 is left, b16-31 is top */
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uint32 HeightWidth; /* b0-15 is width, b16-31 is height */
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} Rectangle[0x10]; /* command can handle upto 16 rectangles */
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} cmd_nv_render_solid_rectangle;/* nv1_render_solid_rectangle is identical */
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//fixme: (setup in progress for DMA) complete or remove (this cmd is not used currently)
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typedef struct {
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} cmd_nv1_image_from_cpu; /* 'pixmap': used in XFree 4.2.0, but not beyond.
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* (Used for the 2D 'ImageWriteScanline' and
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* 'ScanlineImageWriteRect' functions.)
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* Is this command actually usefull? */
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typedef struct {
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uint32 reserved00[0x0004];
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uint16 FifoFree; /* little endian (FIFO internal register) */
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uint16 Nop; /* little endian (FIFO internal register) */
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uint32 reserved01[0x000b];
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uint32 DMAPut; /* b2-28 is DMA Put offset (FIFO internal register) */
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uint32 DMAGet; /* b2-28 is DMA Get offset (FIFO internal register) */
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uint32 reserved02[0x00ae];
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uint32 Format; /* buffer colorspace */
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uint32 Pitch; /* b0-15 is source pitch, b16-31 is dest pitch */
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uint32 OffsetSource; /* b0-31 is source bufferadress offset */
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uint32 OffsetDest; /* b0-31 is dest bufferadress offset */
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} cmd_nv4_surface; /* nv10_context_surfaces_2d is identical as far as used */
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/************************
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* 3D specific commands *
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************************/
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typedef struct {
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uint32 reserved00[0x0004];
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uint16 FifoFree; /* little endian (FIFO internal register) */
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uint16 Nop; /* little endian (FIFO internal register) */
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uint32 reserved01[0x000b];
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uint32 DMAPut; /* b2-28 is DMA Put offset (FIFO internal register) */
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uint32 DMAGet; /* b2-28 is DMA Get offset (FIFO internal register) */
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uint32 reserved02[0x00ae];
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uint32 Colorkey; /* texture colorkey */
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uint32 Offset; /* texture offset */
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uint32 Format; /* texture colorspace, size, and a lot more */
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uint32 Filter; /* texture filtering modes (used for scaling) */
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uint32 Blend; /* triangle blend: shade, perspective, specular.. */
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uint32 Control; /* triangle control: Z-enable, culling, dither.. */
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uint32 FogColor; /* fog colorvalue */
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uint32 reserved03[0x0039];
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struct {
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float ScreenX; /* X */
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float ScreenY; /* Y */
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float ScreenZ; /* depth */
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float RWH; /* eyeM */
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uint32 Color; /* b24-31 Alpha, b16-23 Red, b8-15 Green, b0-7 Blue */
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uint32 Specular; /* b24-31 Fog, b16-23 Red, b8-15 Green, b0-7 Blue */
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float TU; /* texture S */
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float TV; /* texture T */
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} TLVertex[0x10]; /* command can handle upto 16 textured, lit(?) vertexes */
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uint32 TLVDrawPrim[0x40]; /* b20-31 is I5, b16-19 is I4, b12-15 is I3,
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* b8-11 is I2, 4-7 is I1, b0-3 is I0:
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* Ix is a TLVertex[Ix].
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* So: define your (single) texture, define your
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* vertexes, and then program TLVDrawPrim with the
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* order to draw them.
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* You can draw primitives consisting of sets of upto
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* 6 out of 16 defined vertexes this way; and you can
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* draw 64 sets maximum. */
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} cmd_nv4_dx5_texture_triangle; /* nv10_dx5_texture_triangle is identical */
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typedef struct {
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uint32 reserved00[0x0004];
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uint16 FifoFree; /* little endian (FIFO internal register) */
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uint16 Nop; /* little endian (FIFO internal register) */
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uint32 reserved01[0x000b];
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uint32 DMAPut; /* b2-28 is DMA Put offset (FIFO internal register) */
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uint32 DMAGet; /* b2-28 is DMA Get offset (FIFO internal register) */
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uint32 reserved02[0x00b0]; /* fixme? there's more here that's not used apparantly */
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uint32 Pitch; /* b16-31 is Z-buffer, b0-15 is colorbuffer pitch */
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uint32 SetOffsetColor; /* b0-31 is colorbuffer (renderbuffer) offset */
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uint32 SetOffsetZeta; /* b0-31 is Z-buffer (zeta buffer) offset */
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} cmd_nv4_context_surfaces_argb_zs; /* nv10_context_surfaces_argb_zs is identical */
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//fixme: fill this out...
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typedef struct {
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} cmd_nv4_dx6_multi_texture_triangle;/* nv10_dx6_multi_texture_triangle is identical? */
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/************ DMA command defines ***********/
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/* FIFO channels */
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#define NV_GENERAL_FIFO_CH0 0x0000
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#define NV_GENERAL_FIFO_CH1 0x2000
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#define NV_GENERAL_FIFO_CH2 0x4000
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#define NV_GENERAL_FIFO_CH3 0x6000
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#define NV_GENERAL_FIFO_CH4 0x8000
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#define NV_GENERAL_FIFO_CH5 0xa000
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#define NV_GENERAL_FIFO_CH6 0xc000
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#define NV_GENERAL_FIFO_CH7 0xe000
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/* sub-command offsets within FIFO channels */
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#define NV_GENERAL_DMAPUT 0x0040
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#define NV_GENERAL_DMAGET 0x0044
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#define NV_ROP5_SOLID_SETROP5 0x0300
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#define NV_IMAGE_BLACK_RECTANGLE_TOPLEFT 0x0300
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#define NV_IMAGE_PATTERN_SETCOLORFORMAT 0x0300
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#define NV_IMAGE_PATTERN_SETSHAPE 0x0308
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#define NV_IMAGE_PATTERN_SETCOLOR0 0x0310
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#define NV_IMAGE_BLIT_SOURCEORG 0x0300
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//fixme note: non-DMA acc is still using NV3_GDI_RECTANGLE_TEXT...
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//which is just as fast as NV4_GDI_RECTANGLE_TEXT, but has a hardware fault for DMA!
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#define NV4_GDI_RECTANGLE_TEXT_SETCOLORFORMAT 0x0300
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#define NV4_GDI_RECTANGLE_TEXT_COLOR1A 0x03fc
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#define NV4_GDI_RECTANGLE_TEXT_UCR0_LEFTTOP 0x0400
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#define NV4_SURFACE_FORMAT 0x0300
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#define NV_SCALED_IMAGE_FROM_MEMORY_SETCOLORFORMAT 0x0300
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#define NV_SCALED_IMAGE_FROM_MEMORY_SOURCEORG 0x0308
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#define NV_SCALED_IMAGE_FROM_MEMORY_SOURCESIZE 0x0400
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/************************
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* 3D specific commands *
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************************/
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#define NV4_DX5_TEXTURE_TRIANGLE_COLORKEY 0x0300
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#define NV4_DX5_TEXTURE_TRIANGLE_TLVERTEX(i) 0x0400 + (i << 5)
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#define NV4_DX5_TEXTURE_TRIANGLE_TLVDRAWPRIM(i) 0x0600 + (i << 2)
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#define NV4_CONTEXT_SURFACES_ARGB_ZS_PITCH 0x0308
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#endif
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