e02e12de8a
Probably only works under Haiku due to the new area flags. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@12219 a95241bf-73f2-0310-859d-f6bbb57e9c96
529 lines
16 KiB
C
529 lines
16 KiB
C
/*
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Copyright (c) 2002, Thomas Kurschel
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Part of Radeon accelerant
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Interface between kernel driver and accelerant
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*/
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#ifndef _RADEON_INTERFACE_H
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#define _RADEON_INTERFACE_H
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#include <Accelerant.h>
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#include <Drivers.h>
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#include <PCI.h>
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#include <OS.h>
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#include "video_overlay.h"
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#include "benaphore.h"
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// magic code for ioctls
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#define RADEON_PRIVATE_DATA_MAGIC 'TKRA'
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#define MAX_RADEON_DEVICE_NAME_LENGTH MAXPATHLEN
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// list ioctls
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enum {
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RADEON_GET_PRIVATE_DATA = B_DEVICE_OP_CODES_END + 1,
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RADEON_DEVICE_NAME,
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RADEON_GET_LOG_SIZE,
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RADEON_GET_LOG_DATA,
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RADEON_ALLOC_MEM,
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RADEON_FREE_MEM,
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RADEON_WAITFORIDLE,
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RADEON_RESETENGINE,
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RADEON_VIPREAD,
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RADEON_VIPWRITE,
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RADEON_FINDVIPDEVICE,
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RADEON_WAIT_FOR_CAP_IRQ,
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RADEON_DMACOPY,
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};
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// number of indirect buffers
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// see CP.c for this magic number
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#define NUM_INDIRECT_BUFFERS 253
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// size of an indirect buffer in dwords;
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// as hardware wants buffers to be 4k aligned and as we store all
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// buffers in one chunk, the size per buffer in bytes must be a multiple of 4k
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#define INDIRECT_BUFFER_SIZE (4096/4)
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// type of memory
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typedef enum {
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mt_local, // local graphics memory
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mt_PCI, // PCI memory (read: fully cachable)
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mt_AGP, // AGP memory (read: not cachable; currently not supported)
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mt_nonlocal, // non-local graphics memory (alias to one of the
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// previously defined types, see si->nonlocal_type)
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mt_last = mt_nonlocal
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} memory_type_e;
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// list of multi-monitor modes
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typedef enum {
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mm_none, // use one display only
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mm_combine, // combine displays to larger workspace
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mm_clone, // clone workspace, all displays show the
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// same but have independant timing
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mm_mirror // mirror heads (as used by Laptop) - not implemented yet
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} multi_mode_e;
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// displays devices;
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// this must be a bit field as multiple devices may be connected to one CRTC
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typedef enum {
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dd_none = 0,
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dd_tv_crt = 1, // CRT on TV-DAC, i.e. on DVI port
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dd_crt = 2, // CRT on CRT-DAC, i.e. VGA port
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dd_lvds = 4, // laptop flap panel
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dd_dvi = 8, // DVI on primary port (i.e. standard DVI connector)
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dd_ctv = 16, // composite TV on TV-DAC
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dd_stv = 32, // S-Video out on TV-DAC
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// the following connectors/devices are not supported
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dd_dvi_ext = 64 // external DVI (only provided by few models)
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} display_device_e;
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// type of ASIC
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typedef enum {
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rt_r100, // original Radeon
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rt_ve, // original VE version
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rt_m6, // original mobile Radeon
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rt_rs100, // IGP 320M
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rt_rv200, // Radeon 7500
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rt_m7, // mobile Radeon 7500
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rt_rs200, // IGP 330M/340M/350M
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rt_r200, // Radeon 8500/9100
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rt_rv250, // Radeon 9000
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rt_m9, // mobile Radeon 9000
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rt_rv280, // Radeon 9200
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rt_m9plus, // mobile Radeon 9200
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// from here on, r300 and up must be located as ATI modified the PLL
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// with r300 and the code only tests for >= rt_r300
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rt_r300, // Radeon 9700
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rt_r300_4p, // Radeon 9500
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rt_rv350, // Radeon 9600
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rt_m10, // mobile Radeon 9600
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rt_rv360, // Radeon 9600
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rt_r350, // Radeon 9800
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rt_r360 // Radeon 9800
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} radeon_type;
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// TV standard
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typedef enum {
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ts_off,
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ts_ntsc,
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ts_pal_bdghi,
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ts_pal_m,
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ts_pal_nc,
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ts_scart_pal,
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ts_pal_60,
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ts_max = ts_pal_60
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} tv_standard_e;
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// type of TV-Chip
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typedef enum {
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tc_none,
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tc_external_rt1, // external Rage Theatre
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tc_internal_rt1, // internal version 1
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tc_internal_rt2, // internal version 2
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} tv_chip_type;
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// info about cursor
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typedef struct {
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uint8* data; // pointer to framebuffer containing cursor image
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uint16 hot_x;
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uint16 hot_y;
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uint16 x;
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uint16 y;
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uint16 width;
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uint16 height;
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uint32 mem_handle; // memory handle
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uint32 fb_offset; // offset in frame buffer
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bool is_visible; // official flag whether cursor is visible
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} cursor_info;
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// info about flat panel connected to LVDS or DVI port
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typedef struct {
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uint panel_pwr_delay;
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uint panel_xres, panel_yres;
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uint h_blank, h_over_plus, h_sync_width;
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uint v_blank, v_over_plus, v_sync_width;
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uint dot_clock; // in kHz (this is BeOS like, ATI uses 10 kHz steps!)
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bool is_fp2; // true, if second flat panel
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// display_type_e disp_type;
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uint64 h_ratio; // current stretch ratio, needed for overlays
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uint64 v_ratio; // (mode_res/native_res; 32.32)
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} fp_info;
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// crtc info
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typedef struct {
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//bool is_crtc2; // true, if crtc2
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int8 flatpanel_port; // linked flat panel port (-1 if none)
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bool cursor_on_screen; // cursor is visible on this head
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int crtc_idx; // index of CRTC
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display_device_e active_displays; // currently driven displays
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display_device_e chosen_displays; // displays to be driven after next mode switch
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sem_id vblank; // vertical blank interrupt semaphore
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uint32 rel_x, rel_y; // relative position in multi-monitor mode
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display_mode mode; // display mode of this head
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} crtc_info;
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// info about PLLs on graphics card as retrieved from BIOS
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// all values are in 10kHz
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typedef struct {
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uint32 max_pll_freq; // maximum PLL output frequency
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uint32 min_pll_freq; // minimum PLL output frequency
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uint32 xclk; // core frequency
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uint32 ref_div; // default reference divider
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uint32 ref_freq; // PLL reference frequency
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} general_pll_info;
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// mapping of pll divider code to actual divider value
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typedef struct {
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uint8 divider; // divider
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uint8 code; // code as used in register
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} pll_divider_map;
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// info about a PLL
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// all values are in 10 kHz
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typedef struct {
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pll_divider_map *post_divs; // list of possible post dividers
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pll_divider_map *extra_post_divs; // list of possible extra post dividers
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uint32 ref_freq; // reference frequency
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uint32 vco_min, vco_max; // VCO frequency range
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uint32 min_ref_div, max_ref_div; // reference divider range
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uint32 pll_in_min, pll_in_max; // PLL input frequency range
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uint32 extra_feedback_div; // hardwired divider before feedback divider
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uint32 min_feedback_div, max_feedback_div; // feedback divider range
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uint32 best_vco; // preferred VCO frequency (0 for don't care)
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} pll_info;
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// one overlay buffer
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typedef struct overlay_buffer_node {
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struct overlay_buffer_node *next, *prev;
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uint32 mem_handle;
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uint32 mem_offset;
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uint ati_space; // colour space according to ATI
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uint test_reg; // content of test reg
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overlay_buffer buffer;
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} overlay_buffer_node;
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// info about active overlay
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typedef struct {
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overlay_token ot;
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overlay_buffer ob;
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overlay_window ow;
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overlay_view ov;
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uint16 h_display_start;
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uint16 v_display_start;
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overlay_buffer_node *on; // current buffer
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overlay_buffer_node *prev_on; // previous buffer (for temporal deinterlace, currently unused)
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int crtc_idx; // crtc where the overlay is shown on
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uint32 rel_offset; // offset of overlay source due to clipping
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} overlay_info;
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// each accelerant gets one "virtual card", i.e. you
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// can have independant accelerants for each head
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// (this is an ongoing project ;)
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typedef struct {
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uint32 id; // identifier used to know which card the 2D accelerator
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// is prepared for (we use area_id of this structure)
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bool assigned_crtc[2]; // mask of heads assigned to virtual card
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bool used_crtc[2]; // mask of heads assigned to virtual card
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display_device_e controlled_displays; // displays devices controlled byvc
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display_device_e connected_displays; // bit-field of connected displays
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int8 independant_heads; // number of heads to be programmed independantly
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int8 different_heads; // number of heads showing different parts of framebuffer
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bool scroll; // scrolling in virtual area enabled
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uint32 datatype; // Radeon code for pixel format
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uint bpp; // bytes per pixel
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uint32 pitch; // byte offset between two lines
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uint32 eff_width, eff_height; // size of visible area (including both monitors)
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uint32 fb_mem_handle; // memory handle
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uint32 fb_offset; // offset of frame buffer in graphics mem
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cursor_info cursor;
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bool swap_displays; // true to swap monitors
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bool use_laptop_panel; // true to always use laptop panel
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tv_standard_e tv_standard; // standard to use for TV Out
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bool enforce_mode_change; // set to make sure next display mode change
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// is executed even if display mode seems to be
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// still the same
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frame_buffer_config fbc; // data for direct frame buffer access
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display_mode mode; // offical mode with multi-monitor bits set
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overlay_buffer_node *overlay_buffers; // list of allocated overlay buffers
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//int8 whished_overlay_head; // head where users whishes the overlay to be
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bool uses_overlay; // true if this virtual card owns overlay
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int state_buffer_idx;
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int state_buffer_size;
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} virtual_card;
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// status of overlay
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typedef struct {
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vint32 inuse; // one, if someone allocated overlay head
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// (this doesn't necessarily mean that an overlay is shown)
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uint32 token; // arbitrarily chosen token to identify overlay owner
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// (increased by 1 whenever there is a new owner)
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uint32 auto_flip_reg; // content of auto_flip_reg
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} overlay_mgr_info;
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// info about indirect CP buffer
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typedef struct {
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int next; // next used/free buffer (-1 for EOL)
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int32 send_tag; // tag assigned when buffer was submitted
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} indirect_buffer;
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// info about command processor (CP) state
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typedef struct {
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benaphore lock; // lock to be acquired when talking to CP or
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// when accesing this structure
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// ring buffer (in non-local memory)
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struct {
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uint32 mem_offset; // offset in non-local memory
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uint32 vm_base; // base of ring buffer as seen by graphics card
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uint32 tail, tail_mask; // next write position in dwords; mask for wrap-arounds
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uint32 size; // size in dwords
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//uint32 head_offset; // offset for automatically updates head in DMA buffer
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//uint32 start_offset;
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memory_type_e mem_type;
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//uint32 *start; // pointer to ring buffer
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//vuint32 *head; // pointer to automatically updated read position
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uint32 space; // known space in ring buffer
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uint32 mem_handle; // handle of memory of indirect buffers
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} ring;
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// feedback registers (in PCI memory)
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struct {
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//vuint32 *ptr; // pointer to scratch registers
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uint32 scratch_mem_offset; // offset of scratch registers in feedback memory
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uint32 head_mem_offset; // offset of head register in feedback memory
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uint32 scratch_vm_start; // virtual address of scratch as seen by GC
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uint32 head_vm_address; // virtual address of head as seen by GC
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memory_type_e mem_type; // memory type of feedback memory
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uint32 mem_handle; // handle of feedback memory
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} feedback;
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// indirect buffers (in non-local memory)
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// for indeces: -1 means "none"
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struct {
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int free_list; // index of first empty buffer
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int oldest, // oldest submitted buffer
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newest; // newest submitted buffer
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int active_state; // index of active state buffer
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uint64 cur_tag; // tag of last submitted indirect buffer
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memory_type_e mem_type;
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uint32 mem_offset; // offset of indirect buffers in non-local memory
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uint32 vm_start; // start of indirect buffers as seen by graphics card
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indirect_buffer buffers[NUM_INDIRECT_BUFFERS]; // info about buffers
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uint32 mem_handle; // handle of memory of indirect buffers
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} buffers;
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} CP_info;
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// info about different graphics-related memory
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// (see memory_type_e)
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typedef struct {
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area_id area; // area to memory
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uint32 size; // usable size in bytes
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uint32 virtual_addr_start; // virtual address (for graphics card!)
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uint32 virtual_size; // reserved virtual address space in bytes
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} memory_type_info;
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// data published by kernel and shared by all accelerant/virtual cards
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typedef struct {
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// filled out by kernel
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CP_info cp; // info concerning command processor
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// set by accelerant
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struct {
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uint64 count; // count of submitted CP commands
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uint64 last_idle; // count when engine was idle last time
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uint64 written; // last count passed to CP
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benaphore lock; // engine lock
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} engine;
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uint16 vendor_id; // PCI vendor id
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uint16 device_id; // PCI device id
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uint8 revision; // PCI device revision
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//bool has_crtc2; // has second CRTC
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radeon_type asic; // ASIC version
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bool is_mobility; // mobility version
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tv_chip_type tv_chip; // type of TV-Out encoder
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bool new_pll; // r300 style PLL
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uint8 theatre_channel; // VIP channel of Rage Theatre (if applicable)
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general_pll_info pll;
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area_id regs_area; // area of memory mapped registers
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area_id ROM_area; // area of ROM
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//area_id fb_area; // area of frame buffer
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void *framebuffer_pci; // physical address of frame buffer (aka local memory)
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// this is a hack needed by BeOS
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crtc_info crtc[2]; // info about each crtc
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uint8 num_crtc; // number of physical heads
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fp_info flatpanels[2]; // info about connected flat panels (if any)
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memory_type_info memory[mt_last]; // info about memory types
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memory_type_e nonlocal_type; // default type of non-local memory
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uint8 *local_mem; // address of local memory;
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// this is a hack requested by BeOS
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area_id mode_list_area; // area containing display mode list
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uint mode_count;
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uint32 active_vc; // currently selected virtual card in terms of 2D acceleration
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uint32 dac_cntl2; // content of dac_cntl2 register
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overlay_info pending_overlay; // overlay to be shown
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overlay_info active_overlay; // overlay shown
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overlay_mgr_info overlay_mgr; // status of overlay
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// data needed for VBI emulation
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// (currently not fully implemented - if the user disabled graphics card
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// IRQ in the BIOS, it's his fault)
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int refresh_period; // duration of one frame in ms
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int blank_period; // vertical blank period of a frame in ms
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int enable_virtual_irq; // true, to enable virtual interrupts
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struct log_info_t *log; // fast logger data
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} shared_info;
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// retrieve the area_id of the kernel/accelerant shared info
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typedef struct {
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uint32 magic; // magic number
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area_id shared_info_area;
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area_id virtual_card_area;
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} radeon_get_private_data;
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// get devie name (used to clone accelerant)
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typedef struct {
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uint32 magic; // magic number
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char *name; // pointer to buffer containing name (in)
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} radeon_device_name;
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// alloc (non-)local memory
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typedef struct {
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uint32 magic;
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memory_type_e memory_type;// type of memory
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uint32 size; // size in bytes
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uint32 offset; // offset in memory
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uint32 handle; // handle (needed to free memory)
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bool global; // set this to true if memory should persist even
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// if client gets terminated
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} radeon_alloc_mem;
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// free (non-)local memory
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typedef struct {
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uint32 magic;
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memory_type_e memory_type;// type of memory
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uint32 handle; // memory handle
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bool global; // must be same as on alloc_local_mem
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} radeon_free_mem;
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// wait for idle
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typedef struct {
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uint32 magic;
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bool keep_lock; // keep lock after engine is idle
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} radeon_wait_for_idle;
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// read VIP register
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typedef struct {
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uint32 magic;
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uint channel; // channel, i.e. device
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uint address; // address
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uint32 data; // read data
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bool lock; // true, if CP lock must be acquired
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} radeon_vip_read;
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// write VIP register
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typedef struct {
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uint32 magic;
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uint channel; // channel, i.e. device
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uint address; // address
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uint32 data; // data to write
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bool lock; // true, if CP lock must be acquired
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} radeon_vip_write;
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// find channel of device with given ID
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typedef struct {
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uint32 magic;
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uint32 device_id; // id of device
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uint channel; // channel of device (-1 if not found)
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} radeon_find_vip_device;
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// wait for capture interrupt and get status about
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typedef struct {
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uint32 magic;
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bigtime_t timeout; // timeout to wait for irq
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bigtime_t timestamp; // timestamp when last capturing was finished
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uint32 int_status; // content of RADEON_CAP_INT_STATUS
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uint32 counter; // number of capture interrupts so far
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} radeon_wait_for_cap_irq;
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// copy data from frame buffer to some memory location
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typedef struct {
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uint32 magic;
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uint32 src; // offset of source data in frame buffer
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void *target; // target buffer
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size_t size; // number of bytes to copy
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bool lock_mem; // true, if target needs to be locked
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bool contiguous; // true, if target is physically contiguous
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} radeon_dma_copy;
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// parameter for ioctl without further arguments
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typedef struct {
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uint32 magic;
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} radeon_no_arg;
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#endif
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