396b74228e
The kernel is allowed to use fpu anywhere so we must make sure that user state is not clobbered by saving fpu state at interrupt entry. There is no need to do that in case of system calls since all fpu data registers are caller saved. We do not need, though, to save the whole fpu state at task swich (again, thanks to calling convention). Only status and control registers are preserved. This patch actually adds xmm0-15 register to clobber list of task swich code, but the only reason of that is to make sure that nothing bad happens inside the function that executes that task swich. Inspection of the generated code shows that no xmm registers are actually saved. Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>
50 lines
799 B
C
50 lines
799 B
C
/*
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* Copyright 2012, Alex Smith, alex@alex-smith.me.uk.
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* Distributed under the terms of the MIT License.
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*/
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#ifndef _KERNEL_ARCH_X86_64_IFRAME_H
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#define _KERNEL_ARCH_X86_64_IFRAME_H
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struct iframe {
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uint64 type;
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void* fpu;
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uint64 r15;
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uint64 r14;
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uint64 r13;
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uint64 r12;
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uint64 r11;
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uint64 r10;
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uint64 r9;
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uint64 r8;
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uint64 bp;
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uint64 si;
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uint64 di;
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uint64 dx;
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uint64 cx;
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uint64 bx;
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uint64 ax;
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uint64 orig_rax;
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uint64 vector;
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uint64 error_code;
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uint64 ip;
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uint64 cs;
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uint64 flags;
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// SP and SS are unconditionally present on x86_64, make both names
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// available.
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union {
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uint64 sp;
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uint64 user_sp;
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};
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union {
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uint64 ss;
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uint64 user_ss;
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};
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} _PACKED;
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#define IFRAME_IS_USER(f) (((f)->cs & DPL_USER) == DPL_USER)
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#endif /* _KERNEL_ARCH_X86_64_IFRAME_H */
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