147 lines
4.3 KiB
C
147 lines
4.3 KiB
C
/*
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* Copyright (c) 2012-2015 Haiku, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files
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* (the "Software"), to deal in the Software without restriction,
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* including without limitation the rights to use, copy, modify, merge,
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* publish, distribute, sublicense, and/or sell copies of the Software,
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* and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Alexander von Gluck, kallisti5@unixzen.com
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*/
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#ifndef __PLATFORM_BCM283X_H
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#define __PLATFORM_BCM283X_H
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#define SIZE_4K 0x00001000
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/*
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* Found in:
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* Broadcom BCM2835 ARM Peripherals
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* - BCM2835-ARM-Peripherals.pdf
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*/
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// Section 1.2.2
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// These board bases should go away when we start using FDT's
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// (all loader drivers compiled in, drivers chosen based on FDT)
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//
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#define BCM283X_SDRAM_BASE 0x00000000
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#define BCM2835_PERIPHERAL_BASE 0x20000000
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#define BCM2836_PERIPHERAL_BASE 0x3f000000
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// Added to physical addresses to select the different cache behaviours
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#define BCM283X_VIDEO_CORE_L1_L2_CACHED (0 << 30)
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#define BCM283X_VIDEO_CORE_L2_COHERENT (1 << 30)
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#define BCM283X_VIDEO_CORE_L2_CACHED (2 << 30)
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#define BCM283X_VIDEO_CORE_UNCACHED (3 << 30)
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// The highest two bits are used to select aliases to the physical memory
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// with different cache semantic. Clearing them converts the address to
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// physical memory as seen by ARM.
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#define BCM283X_BUS_TO_PHYSICAL(x) (x & ~BCM283X_VIDEO_CORE_UNCACHED)
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#define ST_BASE 0x3000
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// System Timer, sec 12.0, page 172
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#define DMA_BASE 0x7000
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// DMA Controller, sec 4.2, page 39
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#define ARM_BASE 0xB000
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// BCM283X ARM Control Block, sec 7.5, page 112
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#define PM_BASE 0x100000
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// Power Management, Reset controller and Watchdog registers
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#define GPIO_BASE 0x200000
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// GPIO, sec 6.1, page 90
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#define UART0_BASE 0x201000
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// UART 0, sec 13.4, page 177
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#define MMCI0_BASE 0x202000
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// MMC
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#define UART1_BASE 0x215000
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// UART 1, sec 2.1, page 65
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#define EMMC_BASE 0x300000
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// eMMC interface, sec 5, page 66
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#define SMI_BASE 0x600000
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// SMI Base
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#define USB_BASE 0x980000
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// USB Controller, 15.2, page 202
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// FB_BASE will depend on memory split
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// 7.5, page 112
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#define ARM_CTRL_BASE (ARM_BASE + 0x000)
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#define ARM_CTRL_IC_BASa (ARM_BASE + 0x200)
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// Interrupt controller
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#define ARM_CTRL_TIMER0_1_BASE (ARM_BASE + 0x400)
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// Timer 0 and 1
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#define ARM_CTRL_0_SBM_BASE (ARM_BASE + 0x800)
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// ARM Semaphores, Doorbells, and Mailboxes
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/* UART */
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// TODO: Check these UART defines!
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#define UART_RHR 0
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#define UART_THR 0
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#define UART_DLL 0
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#define UART_IER 1
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#define UART_DLH 1
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#define UART_IIR 2
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#define UART_FCR 2
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#define UART_EFR 2
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#define UART_LCR 3
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#define UART_MCR 4
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#define UART_LSR 5
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#define UART_MSR 6
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#define UART_TCR 6
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#define UART_SPR 7
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#define UART_TLR 7
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#define UART_MDR1 8
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#define UART_MDR2 9
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#define UART_SFLSR 10
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#define UART_RESUME 11
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#define UART_TXFLL 10
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#define UART_TXFLH 11
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#define UART_SFREGL 12
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#define UART_SFREGH 13
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#define UART_RXFLL 12
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#define UART_RXFLH 13
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#define UART_BLR 14
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#define UART_UASR 14
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#define UART_ACREG 15
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#define UART_SCR 16
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#define UART_SSR 17
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#define UART_EBLR 18
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#define UART_MVR 19
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#define UART_SYSC 20
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/* Mailbox */
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#define ARM_CTRL_0_MAILBOX_BASE (ARM_CTRL_0_SBM_BASE + 0x80)
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#define ARM_MAILBOX_READ 0x00
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#define ARM_MAILBOX_STATUS 0x18
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#define ARM_MAILBOX_WRITE 0x20
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#define ARM_MAILBOX_FULL (1 << 31)
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#define ARM_MAILBOX_EMPTY (1 << 30)
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#define ARM_MAILBOX_DATA_MASK 0xfffffff0
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#define ARM_MAILBOX_CHANNEL_MASK 0x0000000f
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#define ARM_MAILBOX_CHANNEL_FRAMEBUFFER 1
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#endif /* __PLATFORM_BCM283X_H */
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