715a9925f1
Move ARM MMU definitions to a separate header file. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32332 a95241bf-73f2-0310-859d-f6bbb57e9c96
68 lines
1.7 KiB
C
68 lines
1.7 KiB
C
#ifndef _ARCH_ARM_ARM_MMU_H
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#define _ARCH_ARM_ARM_MMU_H
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/*
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* generic arm mmu definitions
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*/
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/*
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* defines for the page directory (aka Master/Section Table)
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*/
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#define MMU_L1_TYPE_COARSEPAGETABLE 0x1
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//only type used in Haiku by now (4k pages)
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// coarse pagetable entry :
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//
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// 31 10 9 8 5 432 10
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// | page table address |?| domain |000|01
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//
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// the domain is not used so and the ? is implementation specified... have not
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// found it in the cortex A8 reference... so I set t to 0
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// page table must obviously be on multiple of 1KB
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#define MMU_L1_TYPE_SECTION 0x2
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//map 1MB directly instead of using a page table (not used)
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#define MMU_L1_TYPE_FINEEPAGETABLE 0x3
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//map 1kb pages (not used and not supported on newer ARMs)
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/*
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* L2-Page descriptors... now things get really complicated...
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* there are three different types of pages large pages (64KB) and small(4KB)
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* and "small extended".
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* only small extende is used by now....
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* and there is a new and a old format of page table entries
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* I will use the old format...
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*/
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#define MMU_L2_TYPE_SMALLEXT 0x3
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// for B C and TEX see ARM arm B4-11
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#define MMU_L2_FLAG_B 0x4
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#define MMU_L2_FLAG_C 0x8
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#define MMU_L2_FLAG_TEX 0 // use 0b000 as TEX
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#define MMU_L2_FLAG_AP_RW 0x30 // allow read and write for user and system
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// #define MMU_L2_FLAG_AP_
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#define MMU_L1_TABLE_SIZE (4096 * 4)
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//4096 entries (one entry per MB) -> 16KB
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#define MMU_L2_COARSE_TABLE_SIZE (256 * 4)
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//256 entries (one entry per 4KB) -> 1KB
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/*
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* definitions for CP15 r1
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*/
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#define CR_R1_MMU 0x1 // enable MMU
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#define CP_R1_XP 0x800000 // if XP=0 then use backwards comaptible
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// translation tables
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#endif /* _ARCH_ARM_ARM_MMU_H */
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