62 lines
2.2 KiB
C
62 lines
2.2 KiB
C
/*
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Copyright (c) 2002, Thomas Kurschel
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Part of Radeon driver
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Bus Control registers
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*/
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#ifndef _BUSCNTRL_REGS_H
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#define _BUSCNTRL_REGS_H
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#define RADEON_BUS_CNTL 0x0030
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# define RADEON_BUS_MASTER_DIS (1 << 6)
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# define RADEON_BUS_RD_DISCARD_EN (1 << 24)
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# define RADEON_BUS_RD_ABORT_EN (1 << 25)
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# define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28)
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# define RADEON_BUS_WRT_BURST (1 << 29)
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# define RADEON_BUS_READ_BURST (1 << 30)
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#define RADEON_BUS_CNTL1 0x0034
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# define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4)
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#define RADEON_AGP_CNTL 0x0174
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# define RADEON_AGP_APER_SIZE_256MB (0x00 << 0)
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# define RADEON_AGP_APER_SIZE_128MB (0x20 << 0)
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# define RADEON_AGP_APER_SIZE_64MB (0x30 << 0)
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# define RADEON_AGP_APER_SIZE_32MB (0x38 << 0)
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# define RADEON_AGP_APER_SIZE_16MB (0x3c << 0)
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# define RADEON_AGP_APER_SIZE_8MB (0x3e << 0)
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# define RADEON_AGP_APER_SIZE_4MB (0x3f << 0)
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# define RADEON_AGP_APER_SIZE_MASK (0x3f << 0)
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#define RADEON_AGP_COMMAND 0x0f60 /* PCI */
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#define RADEON_AGP_PLL_CNTL 0x000b /* PLL */
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#define RADEON_AGP_STATUS 0x0f5c /* PCI */
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# define RADEON_AGP_1X_MODE 0x01
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# define RADEON_AGP_2X_MODE 0x02
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# define RADEON_AGP_4X_MODE 0x04
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# define RADEON_AGP_MODE_MASK 0x07
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#define RADEON_MM_DATA 0x0004
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#define RADEON_AIC_CNTL 0x01d0
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# define RADEON_PCIGART_TRANSLATE_EN (1 << 0)
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// the limit is taken from XFree86; actually, I haven't
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// found any restrictions in the specs
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#define ATI_MAX_PCIGART_PAGES 8192 // 32 MB aperture, 4K pages
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#define ATI_PCIGART_PAGE_SIZE 4096 // PCI GART page size
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#define RADEON_AIC_STAT 0x01d4
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#define RADEON_AIC_PT_BASE 0x01d8
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#define RADEON_AIC_LO_ADDR 0x01dc
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#define RADEON_AIC_HI_ADDR 0x01e0
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#define RADEON_AIC_TLB_ADDR 0x01e4
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#define RADEON_AIC_TLB_DATA 0x01e8
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#define RADEON_HOST_PATH_CNTL 0x0130
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# define RADEON_HDP_SOFT_RESET (1 << 26)
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# define RADEON_HDP_APER_CNTL (1 << 23)
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#endif
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