a23ac85fa9
busses/pci/x86: add Other add-ons are in following commits. Change-Id: I7a77bfaef0e8995917b4b54c8369d7075533ec26 Reviewed-on: https://review.haiku-os.org/c/haiku/+/6220 Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org> Reviewed-by: waddlesplash <waddlesplash@gmail.com>
116 lines
3.2 KiB
C
116 lines
3.2 KiB
C
/*
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* Copyright 2008, Haiku Inc. All rights reserved.
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* Distributed under the terms of the MIT License.
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*/
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#ifndef _PCI2_H
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#define _PCI2_H
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#include <device_manager.h>
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#include <PCI.h>
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typedef struct pci_device pci_device;
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typedef struct pci_device_module_info {
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driver_module_info info;
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uint8 (*read_io_8)(pci_device *device, addr_t mappedIOAddress);
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void (*write_io_8)(pci_device *device, addr_t mappedIOAddress,
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uint8 value);
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uint16 (*read_io_16)(pci_device *device, addr_t mappedIOAddress);
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void (*write_io_16)(pci_device *device, addr_t mappedIOAddress,
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uint16 value);
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uint32 (*read_io_32)(pci_device *device, addr_t mappedIOAddress);
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void (*write_io_32)(pci_device *device, addr_t mappedIOAddress,
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uint32 value);
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phys_addr_t (*ram_address)(pci_device *device, phys_addr_t physicalAddress);
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uint32 (*read_pci_config)(pci_device *device, uint16 offset,
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uint8 size);
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void (*write_pci_config)(pci_device *device, uint16 offset,
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uint8 size, uint32 value);
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status_t (*find_pci_capability)(pci_device *device, uint8 capID,
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uint8 *offset);
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void (*get_pci_info)(pci_device *device, struct pci_info *info);
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status_t (*find_pci_extended_capability)(pci_device *device, uint16 capID,
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uint16 *offset);
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uint8 (*get_powerstate)(pci_device *device);
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void (*set_powerstate)(pci_device *device, uint8 state);
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// MSI/MSI-X
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uint8 (*get_msi_count)(pci_device *device);
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status_t (*configure_msi)(pci_device *device,
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uint8 count,
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uint8 *startVector);
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status_t (*unconfigure_msi)(pci_device *device);
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status_t (*enable_msi)(pci_device *device);
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status_t (*disable_msi)(pci_device *device);
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uint8 (*get_msix_count)(pci_device *device);
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status_t (*configure_msix)(pci_device *device,
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uint8 count,
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uint8 *startVector);
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status_t (*enable_msix)(pci_device *device);
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} pci_device_module_info;
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enum {
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kPciRangeInvalid = 0,
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kPciRangeIoPort = 1,
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kPciRangeMmio = 2,
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kPciRangeMmio64Bit = 1 << 0,
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kPciRangeMmioPrefetch = 1 << 1,
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kPciRangeMmioEnd = 6,
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kPciRangeEnd = 6,
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};
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typedef struct pci_resource_range {
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uint32 type;
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phys_addr_t host_addr;
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phys_addr_t pci_addr;
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uint64 size;
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} pci_resource_range;
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typedef struct pci_controller_module_info {
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driver_module_info info;
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// read PCI config space
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status_t (*read_pci_config)(void *cookie,
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uint8 bus, uint8 device, uint8 function,
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uint16 offset, uint8 size, uint32 *value);
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// write PCI config space
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status_t (*write_pci_config)(void *cookie,
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uint8 bus, uint8 device, uint8 function,
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uint16 offset, uint8 size, uint32 value);
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status_t (*get_max_bus_devices)(void *cookie, int32 *count);
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status_t (*read_pci_irq)(void *cookie,
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uint8 bus, uint8 device, uint8 function,
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uint8 pin, uint8 *irq);
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status_t (*write_pci_irq)(void *cookie,
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uint8 bus, uint8 device, uint8 function,
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uint8 pin, uint8 irq);
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status_t (*get_range)(void *cookie, uint32 index, pci_resource_range *range);
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status_t (*finalize)(void *cookie);
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} pci_controller_module_info;
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/* Attributes of PCI device nodes */
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#define B_PCI_DEVICE_DOMAIN "pci/domain" /* uint32 */
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#define B_PCI_DEVICE_BUS "pci/bus" /* uint8 */
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#define B_PCI_DEVICE_DEVICE "pci/device" /* uint8 */
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#define B_PCI_DEVICE_FUNCTION "pci/function" /* uint8 */
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#endif /* _PCI2_H */
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