Commit Graph

16 Commits

Author SHA1 Message Date
Michael Lotz
e9922e775f haiku_loader: Fix wrong size of gBootGDT on x86_64.
The BOOT_GDT_SEGMENT_COUNT was based on USER_DATA_SEGMENT on both
x86 and x86_64. However, on x86_64 the order of the segments is
different, leading to a too small gBootGDT array. Move the define to
the arch specific headers so they can be setup correctly in either case.
Also add a STATIC_ASSERT() to check that the descriptors fit into the
array.

Pointed out by CID 1210898.
2014-10-22 21:06:07 +02:00
Paweł Dziepak
396b74228e kernel/x86_64: save fpu state at interrupts
The kernel is allowed to use fpu anywhere so we must make sure that
user state is not clobbered by saving fpu state at interrupt entry.
There is no need to do that in case of system calls since all fpu
data registers are caller saved.

We do not need, though, to save the whole fpu state at task swich
(again, thanks to calling convention). Only status and control
registers are preserved. This patch actually adds xmm0-15 register
to clobber list of task swich code, but the only reason of that is
to make sure that nothing bad happens inside the function that
executes that task swich. Inspection of the generated code shows
that no xmm registers are actually saved.

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>
2014-09-14 19:16:52 +02:00
Paweł Dziepak
4b75a1e237 kernel/x86_64: implement x86_swap_pgdir in C++
No reason not to inline this function.

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>
2014-08-25 23:07:29 +02:00
Paweł Dziepak
2e2c9bd3d0 os/support: implement atomic_*() using GCC builtin helpers
If GCC knows what these functions are actually doing the resulting
code can be optimized better what is especially noticeable in case of
invocations of atomic_{or,and}() that ignore the result. Obviously,
everything is inlined what also improves performance.

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>
2014-08-25 23:05:07 +02:00
Pawel Dziepak
76636769bd kernel/x86_64: inline x86_{read, write}_msr()
This patch makes it possible to inline rdmsr and wrmsr instruction. The
performance impact shouldn't be significant since they are used relatively
rarely and wrmsr is usually a serializing instruction, but there is no reason
not to do so.
2014-05-06 21:41:49 +02:00
Pawel Dziepak
88e8e24c84 kernel/x86_64: improve context switch implementation
The goal of this patch is to amortize the cost of context switch by making
the compiler aware that context switch clobbers all registers. Because all
register need to be saved anyway there is no additional cost of using
callee saved register in the function that does the context switch.
2014-05-06 21:15:55 +02:00
Pawel Dziepak
9db5b975f9 kernel/x86_64: rework of IDT handling code
Similarly to previous patch regarding GDT this is mostly a rewrite of
IDT handling code from C to C++. Thanks to constexpr IDT is now entirely
generated at compile-time.
2014-05-06 14:59:54 +02:00
Pawel Dziepak
cd59bf4349 kernel/x86_64: x86_64 gdt handling code overhaul
Virtually no functional change, just rewriting the code from
"C in *.cpp files" to C++. Use of constexpr may be advantageous but
that code is not performance critical anyway.
2014-05-06 14:59:53 +02:00
Pawel Dziepak
527da4ca8a x86[_64]: Separate bootloader and kernel GDT and IDT logic
From now on bootloader sets up its own minimal valid GDT and IDT. Then
the kernel replaces them with its own tables.
2014-01-28 00:44:02 +01:00
Pawel Dziepak
8cf8e53774 kernel/x86: Inline atomic functions and memory barriers 2014-01-06 09:08:53 +01:00
Pawel Dziepak
611376fef7 x86: Let each CPU have its own GDT 2013-12-17 03:57:20 +01:00
Alex Smith
cc30eec43d System call restart support. 2012-08-05 14:20:37 +01:00
Alex Smith
bcb07a319b Implemented the rest of the kernel debugger functions for x86_64.
Merged with the x86 implementations, mostly the same except for a
few differences. GDB stub is currently broken, will investigate
later.
2012-07-13 14:09:09 +01:00
Alex Smith
b5c9d24abc Implemented threading for x86_64.
* Thread creation and switching is working fine, however threads do not yet
  get interrupted because I've not implemented hardware interrupt handling
  yet (I'll do that next).
* I've made some changes to struct iframe: I've removed the e/r prefixes
  from the member names for both 32/64, so now they're just named ip, ax,
  bp, etc. This makes it easier to write code that works with both 32/64
  without having to deal with different iframe member names.
2012-07-09 16:43:01 +01:00
Alex Smith
4304bb9894 Added arch_cpu.cpp to the x86_64 build.
* Some things are currently ifndef'd out completely for x86_64 because
  they aren't implemented, there's a few other ifdef's to handle x86_64
  differences but most of the code works unchanged.
* Renamed some i386_* functions to x86_*.
* Added a temporary method for setting the current thread on x86_64
  (a global variable, not SMP safe). This will be changed to be done
  via the GS segment but I've not implemented that yet.
2012-07-04 14:06:46 +01:00
Alex Smith
0897e314b7 Merged x86_64 headers into x86 headers.
Not many changes seeing as there's not much x86_64 stuff done yet. Small
differences are handled with ifdefs, large differences (descriptors.h,
struct iframe) have separate headers under arch/x86/32 and arch/x86/64.
2012-07-02 18:47:06 +01:00