* The team and thread kernel structures have been renamed to Team and Thread
respectively and moved into the new BKernel namespace.
* Several (kernel add-on) sources have been converted from C to C++ since
private kernel headers are included that are no longer C compatible.
Changes after merging:
* Fixed gcc 2 build (warnings mainly in the scary firewire bus manager).
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@40196 a95241bf-73f2-0310-859d-f6bbb57e9c96
Suggested by Ingo in ticket #6139. Code is adapted from x86.
Note that on ppc64 GPR1 needs to be 64-bit, thus the choice of addr_t.
Resolves part of ticket #6160.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37281 a95241bf-73f2-0310-859d-f6bbb57e9c96
where appropriate.
* Typedef'ed page_num_t to phys_addr_t and used it in more places in
vm_page.{h,cpp}.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36937 a95241bf-73f2-0310-859d-f6bbb57e9c96
arch_debug_registers instead.
* Call arch_debug_save_registers() on all CPUs when entering the kernel
debugger.
* Added debug_get_debug_registers() to return a specified CPU's saved
registers.
* x86:
- Replaced the previous arch_debug_save_registers() implementation. Disabled
getting the registers via the gdb interface for the time being.
- Fixed the "sc", "call", and "calling" commands to also work for threads
running on another CPU.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35907 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Pulled the physical page mapping functions out of vm_translation_map into
a new interface VMPhysicalPageMapper.
* Renamed vm_translation_map to VMTranslationMap and made it a proper C++
class. The functions in the operations vector have become methods.
* Added class GenericVMPhysicalPageMapper implementing VMPhysicalPageMapper
as far as possible (without actually writing new code).
* Adjusted the x86 and the PPC specifics accordingly (untested for the
latter). For the other architectures the build is, I'm afraid, seriously
broken.
The next steps will modify and extend the VMTranslationMap interface, so that
it will be possible to fix the bugs in vm_unmap_page[s]() and employ
architecture specific optimizations.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35066 a95241bf-73f2-0310-859d-f6bbb57e9c96
(mostly at least). Also disables -Werror for the binutils, but those should
be fixed eventually.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@29804 a95241bf-73f2-0310-859d-f6bbb57e9c96
to contain headers shared by kernel and userland (mainly libroot).
* Moved quite a few private kernel headers to the new location. Split
several kernel headers into a shared part and one that is still kernel
private. Adjusted all affected Jamfiles and source in the standard x86
build accordingly. The build for other architectures and for test code
may be broken.
* Quite a bit of userland code still includes private kernel headers.
Mostly those are <util/*> headers. The ones that aren't strictly
kernel-only should be moved to some other place (maybe
headers/private/shared/util).
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@25486 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Allow userland teams to create areas below 1 MB when requested specifically.
* Note, this is a temporary solution - see the comments in the code.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@25358 a95241bf-73f2-0310-859d-f6bbb57e9c96
at boot, per cpu, detect the cpu, pull down all the relevant cpuid bits and
save them into the per-cpu structure. Changed most of the code scattered here
and there that reads the cpuid to use a new api, x86_check_feature, which looks
at the saved bits.
Also changed the system_info stuff to read from these bits.
While i was at it, refreshed all the bits to be current.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@20072 a95241bf-73f2-0310-859d-f6bbb57e9c96
code. The stack pointer was not adjusted, hence we were
overwriting the previous register value. But it looks like I
missed to check in the arch_cpu.h with the iframe structure
including the floating point registers anyway.
* Backported the ELF PPC relocation code from the boot loader to
the kernel.
* Fixed the PPC version of arch_thread_switch_kstack_and_call().
Apparently the signature had changed, but the assembly
implementation was not adjusted accordingly.
* sc prints more registers now (LR, CR, CTR, XER,...).
* Fixed several occurences of not-working fault handlers.
Apparently the compiler realized, that the "error" label was
never jumped to (by the code it knew), and optimized the
respective code away. Now we use a trick to make it think the
error label might actually be jumped to. I wonder whether the
x86 version has the same problem when being compiled with GCC4.
* Adopted the x86 page fault handling interrupt code.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15933 a95241bf-73f2-0310-859d-f6bbb57e9c96
* Cloned iframe stack management from x86.
* Reimplemented arch_thread_{get,set}_current_thread(). The
thread structure is stored in SPRG2. It is set to NULL in
arch_cpu_preboot_init(), now. A non-null current thread
causes all kinds of undesired behavior in early boot code.
* We establish the address space mappings we know from the
Open Firmware as areas. At least those in kernel address
space. The ones in userland address space are tougher.
Fortunately on my Mac mini there aren't any save the
boot_loader stack, which is not needed any longer anyway.
* Added stack trace support to the kernel debugger. Mostly
cloned and adjusted the x86 code. Some bits are still
missing, like stack traces for other threads.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15890 a95241bf-73f2-0310-859d-f6bbb57e9c96
void after turning off BAT for the segment containing itself.
The monster macro for the exception vector code was not really
elegant besides being too long for the 32 byte performance
monitor exception slot. Furthermore wasting three of the SPRG*
registers as cheap scratch memory wasn't that nice either.
We now have a three-step approach: The exception vectors
themselves contain only five instructions which branch to common
code at the beginning of the same physical page. That one sets
up BAT for itself, turns address translation back on and jumps
into the kernel. There we turn off BAT again, dump an iframe,
and enter the actual exception handler (/dispatcher). Upon return
the registers are restored from the iframe and we get back to the
place where the exception occurred.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15881 a95241bf-73f2-0310-859d-f6bbb57e9c96
The time base conversion factor is the 32 bit value
2^32 * 1000000 / time base frequency,
so the system time can be computed by
system time = time base * conversion factor / 2^32.
The expression in system_time() looks more complicated now, but is
actually much faster (factor 2.5 on my Mac mini). I'm positively
surprised, how good the assembly looks, that GCC 4 generates. There's
not that much potential for optimization by hand-coding the function.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15863 a95241bf-73f2-0310-859d-f6bbb57e9c96
device in the Open Firmware implementation of boot loader and
pass its path to the kernel, where it's opened and used for
getting/setting the real time. The expensive atomic_*64() on PPC
32-bit make things a bit more complicated. Moreover, missing
64 bit multiplication and division instructions won't really
allow system_time() to be anywhere near as fast as on x86. :-/
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15837 a95241bf-73f2-0310-859d-f6bbb57e9c96
Basically the architecture specific code is now responsible to
init and make use of the platform specific code, now. The reason
being that we have only one kernel per platform and thus cannot
decide at compile time, which platform to use (if any).
The PPC implementation features an abstract base class PPCPlatform
(implemented for all supported platforms) through which platform
support is provided.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15824 a95241bf-73f2-0310-859d-f6bbb57e9c96
bus, and time base frequency) in the PPC boot loader, and propagate
them to the kernel via kernel_args.
* Now we use the correct time base frequency for timer calculations.
* Implemented PPC specific system info stuff. Added a few PPC CPU
types to <OS.h>.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15817 a95241bf-73f2-0310-859d-f6bbb57e9c96
remapping stuff into separate functions and made them available to
others.
* Remap the exception handler space in arch_int_init_post_vm() into the
kernel address space (same issue as with the page table).
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15783 a95241bf-73f2-0310-859d-f6bbb57e9c96
According to the spec we need to set it before taking over the MMU,
but we can't call it before arch_mmu_init(), since we need the OF
to allocate the page table. So we do it after we have allocated
the new page table.
* Added PPC specific kernel_args: The virtual address ranges we want
to keep in the kernel. We fill that in with the translations we
find when initializing the MMU stuff. We remove the memory the
boot loader occupies from those. Besides the stack for the boot
loader only the OF stuff remains.
* arch_mmu_allocate() now starts to search at KERNEL_BASE for a free
virtual address when no particular address is requested. This saves
us further trouble in the kernel, since those allocations would
need to be remapped otherwise.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15780 a95241bf-73f2-0310-859d-f6bbb57e9c96
the fact that I couldn't find ptesync in an otherwise more complete
documentation I downloaded yesterday made me suspicious.
* arch_cpu_global_TLB_invalidate() uses tlbia now. The instruction is
optional, but so is tlbie (how I understood it is that both exist,
when the architecture implementation has a TLB). And the former loop
looked just scary.
* Implemented arch_cpu_user_TLB_invalidate(). It does just the same as
arch_cpu_global_TLB_invalidate().
* Some changes with respect to synchronization required on page table
and segment register updates.
* Some more minor renaming. Pulled a new function
remove_page_table_entry() out of unmap_tmap().
* In arch_vm_translation_map_init_post_area() we do now remap the page
table into the kernel address space, if it was without before. The
page table might actually be a good application for BAT, though.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15773 a95241bf-73f2-0310-859d-f6bbb57e9c96
this saves 4 bytes per page. To compensate the loss of bytes, the offset is now
stored in page size units, that's enough to address 2^44 or 16 TB (which is now
the maximal supported file size!).
* Renamed vm_page::ppn to physical_page_number.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15637 a95241bf-73f2-0310-859d-f6bbb57e9c96
arch/*/thread_struct.h to arch_thread_types.h, so that it can directly
be included without having to specify the architecure.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15616 a95241bf-73f2-0310-859d-f6bbb57e9c96
has not yet been tested, though - I'll do this after this commit):
* Removed the arch_memory_type stuff from vm_area; since there are only 8 memory
ranges on x86, it's simply overkill. The MTRR code now remembers the area ID
and finds the MTRR that way (it could also iterate over the existing MTRRs).
* Introduced some post_modules() init functions.
* If the other x86 CPUs out there don't differ a lot, MTRR functionality might
be put back into the kernel.
* x86_write_msr() was broken, it wrote the 64 bit number with the 32 bit words
switched - it took me some time (and lots of #GPs) to figure that one out.
* Removed the macro read_ebp() and introduced a function x86_read_ebp()
(it's not really a time critical call).
* Followed the Intel docs on how to change MTRRs (symmetrically on all CPUs
with caches turned off).
* Asking for memory types will automatically change the requested length to
a power of two - note that BeOS seems to behave in the same, although that's
not really very clean.
* fixed MTRRs are ignored for now - we should make sure at least, though,
that they are identical on all CPUs (or turn them off, even though I'd
prefer the BIOS stuff to be uncacheable, which we don't enforce yet, though).
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15528 a95241bf-73f2-0310-859d-f6bbb57e9c96
Lots of cleanup:
- moved B_NO_ENABLE_COUNTER flag definition out of int.h to KernelExport.h, as it's
described in the BeBook (although it's probably not really used that often :))
- int.c no longer has any platform dependent code (+ 0x20 on interrupt numbers is gone);
it's now entirely handled in the arch/x86/ section.
- the io_vectors[] is now statically initialized, instead of allocated from the heap
- removed {install|remove}_interrupt_handler(); they weren't that useful, arch_smp_init()
is now calling install_io_interrupt_handler() correctly instead
- introduced a new arch_int.h header file that currently contains NUM_IO_VECTORS only
(though on x86, it also has ARCH_INTERRUPT_BASE == 0x20).
- changed the return type from {install|remove}_io_interrupt_handler() from "long" to
"status_t"
- rearranged and cleaned the PIC initialization code, made the PIC code more prominent
- changed comments that talk about a non existing 8239 (the PIC chip is actually 8259)
- moved arch/x86/interrupts.h to the source directory, as it's not used outside
- added BeOS compatible interrupts_enabled() function, that should replace our
equivalent (and private) are_interrupts_enabled()
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@12477 a95241bf-73f2-0310-859d-f6bbb57e9c96
Added constructors to block_address_translation and segment_descriptor
that will clear its memory (could be done more efficiently though, it just
uses memset()).
Added definitions for the MSR (machine state register).
Added tlbsync() macro (direct assembler call).
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@5092 a95241bf-73f2-0310-859d-f6bbb57e9c96
Added an alternative page_table_entry::SecondaryHash() signature.
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@4988 a95241bf-73f2-0310-859d-f6bbb57e9c96
Jérôme Duval