the new cpuid stuff was apparently exacerbating an existing problem where various bits of low level
cpu code (specifically get_current_cpu) weren't really initialized before being used. Changed the
order to set up a fake set of threads to point each cpu at really early in boot to make sure that at
all points in code it can get the current 'thread' and thus the current cpu.
A probably better solution would be to have dr3 point to the current cpu which would then point to the
current thread, but that has a race condition that would require an int disable, etc.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@20160 a95241bf-73f2-0310-859d-f6bbb57e9c96
at boot, per cpu, detect the cpu, pull down all the relevant cpuid bits and
save them into the per-cpu structure. Changed most of the code scattered here
and there that reads the cpuid to use a new api, x86_check_feature, which looks
at the saved bits.
Also changed the system_info stuff to read from these bits.
While i was at it, refreshed all the bits to be current.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@20072 a95241bf-73f2-0310-859d-f6bbb57e9c96
kernel TLBs from being flushed on context switch.
* new arch_cpu_user_TLB_invalidate() that now does what arch_cpu_global_TLB_invalidate()
did before.
* arch_cpu_global_TLB_invalidate() will now flush all TLBs, even those from the
kernel.
* some cleanups.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15535 a95241bf-73f2-0310-859d-f6bbb57e9c96
has not yet been tested, though - I'll do this after this commit):
* Removed the arch_memory_type stuff from vm_area; since there are only 8 memory
ranges on x86, it's simply overkill. The MTRR code now remembers the area ID
and finds the MTRR that way (it could also iterate over the existing MTRRs).
* Introduced some post_modules() init functions.
* If the other x86 CPUs out there don't differ a lot, MTRR functionality might
be put back into the kernel.
* x86_write_msr() was broken, it wrote the 64 bit number with the 32 bit words
switched - it took me some time (and lots of #GPs) to figure that one out.
* Removed the macro read_ebp() and introduced a function x86_read_ebp()
(it's not really a time critical call).
* Followed the Intel docs on how to change MTRRs (symmetrically on all CPUs
with caches turned off).
* Asking for memory types will automatically change the requested length to
a power of two - note that BeOS seems to behave in the same, although that's
not really very clean.
* fixed MTRRs are ignored for now - we should make sure at least, though,
that they are identical on all CPUs (or turn them off, even though I'd
prefer the BIOS stuff to be uncacheable, which we don't enforce yet, though).
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15528 a95241bf-73f2-0310-859d-f6bbb57e9c96
and why they are called.
Introduced a cpu_init_post_vm() that will now call arch_init_post_vm() instead
of letting main() doing it.
Fixed some return types (mostly from int to status_t).
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@9438 a95241bf-73f2-0310-859d-f6bbb57e9c96
Changed the file_descriptor structure (more status_t, name removed).
Changed "extern inline" to "static inline" in thread.h/arch_thread.h as those
also work with -O0 -g.
Added prototypes for [arch_cpu_]user_strlcpy().
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@1454 a95241bf-73f2-0310-859d-f6bbb57e9c96
