* Left over var name from my test code
* This should be pretty close to functional
(if not already working)
* Any more uart experimentation will not
reach upstream until working.
* Confirmed this places pins in miniUART mode
(we don't want this mode however)
* We do need to fully understand *which* mode
the pins need to be in for PL011 mode.. however
the boot state of the Pi is PL011
Let's say the timer is waken up when its hook is called. This patch
reduces ~41% wakeups during idle
Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
* Enable/Disable makes more sense and matches
platform loader serial functions.
* Rework PL011 code after finding a PDF covering
the details of it.
* Rename UART global defines in loader to be more
exact about location
* This makes things a little more flexible and
the interface to use the uarts cleaner.
* May want to make a generic Uart wrapper
class in uart.h / uart.cpp and call drivers
as needed from there.
* Avoid name collisions
* This uart stuff may work better as a class at
some point, however I didn't want to rock the
u-boot boat *too* much as I don't have the
hardware to test.
* Add nested function wrappers to allow usage of other
uart drivers depending on board. We may want to use this
on other platforms at some point (haha, maybe)
* Thanks go out to Simon Arlott for replacing
the first32k.bin blob with assembly removing
the need for first32k.bin hack.
* This assembly is a modified version removing
the Linux kernel boot args.
* haiku_loader renamed to kernel.img will boot
on Raspberry Pi directly.
* Make Kernel ARM UART slightly more generic
through (BOARD_UART_CLOCK) configured per board
* Add initial Raspberry Pi serial code
* Still rough and non-working
AMD C1E is a BIOS controlled C3 state. Certain processors families
may cut off TSC and the lapic timer when it is in a deep C state,
including C1E state, thus the cpu can't be waken up and system will hang.
This patch firstly adds the support of idle selection during boot. Then
it implements amdc1e_noarat_idle() routine which checks the MSR which
contains the C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27) before
executing the halt instruction, then clear them once set.
However intel C1E doesn't has such problem. AMD C1E is a BIOS controlled
C3 state. The difference between C1E and C3 is that transition into C1E
is not initiated by the operating system. System will enter C1E state
automatically when both cores enters C1 state. As for intel C1E, it
means "reduce CPU voltage before entering corresponding Cx-state".
This patch may fix#8111, #3999, #7562, #7940 and #8060
Copied from the description of #3999:
>but for some reason I hit the power button instead of the reset one. And
>the boot continued!!
The reason is CPUs are waken up once power button is hit.
Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
This should be useful for SAM440 and SAM460 boards for example.
The generic U-Boot code still has some ARM-specific parts that must be moved out though.
* If dladdr can't find an exact match, it returns the nearest symbol
less than the given address.
* If no suitable symbol can be found, but the address is within a
loaded library, dladdr returns the library name and base address.
Signed-off-by: Ingo Weinhold <ingo_weinhold@gmx.de>
* The pointer to the ICU converter that's kept in TLS needs to be
reset (to NULL) immediately after closing it, as opening a new
container may fail, leaving a dangling pointer to a now closed
container in the TLS value.
Fixes#8361 & the userland cause of #8430.
Mac OS X 10.7 generates a gcc2 cross-compiler that fails when assigning NULL to a static method pointer so is still broken.
Added a weak attribute in driver_settings.cpp.
Move futimesat() from fs.cpp to fs_darwin.cpp since it is implimented on FreeBSD.
Implemented eaccess(), for the AT_EACCESS flag of faccessat()
Fix configure script to correctly detect case-sensitive file system
* If apic is not present, the smp code never gets called
to set up the fpu.
* Detect lack of apic, and set up fpu in arch_cpu.
* Should fix#8346 and #8348
* Prepend x86_ to non-static x86 code
* Add x86_init_fpu function to kernel header
* Don't init fpu multiple times on smp systems
* Verified fpu is still started on smp and non-smp
* SSE code still generates general protection faults
on smp systems though
* yuck, glibc uses yet another version of mbstate_t (__c_mbstate_t),
adjusting this to match the other glibc-internal version (__mbstate_t)
fixes another crash triggered by fwide_test.
* instead of unification, we now keep both our and glibc's fields
separate in order to allow for both our code and glibc's to use
such a struct at the same time (independently)
* _IO_USER_BUF was being used to indicate a user-owned buffer without
taking into account that there are two of those: one for the normal
and another one for the wide version of a stream. Backport
_IO_FLAGS2_USER_WBUF from current glibc version to fix that.
* Rename init_sse to init_fpu and handle FPU setup.
* Stop trying to set up FPU before VM init.
We tried to set up the FPU before VM init, then
set it up again after VM init with SSE extensions,
this caused SSE and MMX applications to crash.
* Be more logical in FPU setup by detecting CPU flag prior
to enabling FPU. (it's unlikely Haiku will run on
a processor without a fpu... but lets be consistant)
* SSE2 gcc code now runs (faster even) without GPF
* tqh confirms his previously crashing mmx code now works
* The non-SSE FPU enable after VM init needs tested!
* add Wcscoll() and Wcsxfrm() ICU locale backend
* provide implementations of wcscoll() and wcsxfrm() that are using
the respective methods of the locale backend
Mostly done because olta want less dependency on glibc.
It should also make porting a tiny bit simpler.
Testresults, mean values on Haiku from libMicro:
* with glibc: strlen_10: 0.03859S, strlen_1k: 1.67075S.
* with strlen.cpp: strlen_10: 0.03854S, strlen_1k: 1.66938S.
So at least on my machine it's possible to beat glibc ;)
* Use TimeZone::SHORT specifier instead of SHORT_COMMONLY_USED, since
the former yields more appropriate (textual) values. Strangely enough,
it used to be the other way around, which is why we didn't used SHORT
in the past.
* Glibc declares and uses its own version of mbstate_t, which is
incompatibly with our own. Mix our own fields into glibc's
mbstate_t, such that the two structs are compatible.
* make room in mbstate_t for containing an ICU-converter's state
(well, in fact the whole converter object)
* adjust libroot's locale add-on to clone converters into a given
mbstate_t directly
* adjust ICUThreadLocalStorageValue to contain the converter pointer
instead of a converter-ID (if the converter is related to an
mbstate_t, it points into the mbstate_t).
* adjust users of converters to directly use converter pointers
instead of ICUConverterRef
* drop now unused ICUConverterManager and ICUConverterRef
* update gcc4 optional package
This brings our multibyte implementation into a fully working state,
both non-ascii and non-8-bit characters can now be handled normally
in the Terminal, i.e. this finally fixes#6276.
N.B.: Since the size of mbstate_t has changed, everything (including
the compiler!) needs to be rebuilt.
* the reference to MB_CUR_MAX requires stdlib.h
* if an conversion error occurs, the returned src pointer must point to
the character that triggered the error
* src was sometimes accessed incorrectly (needs double dereference)
* the source pointers may only be adjusted in case there is the
destination pointer is not NULL
* add MultibyteStringToWchar() to ICU locale backend
* implement mbsrtowcs() and mbsnrtowcs() on top of
MultibyteStringToWchar()
* drop respective glibc files
When forking a team, copy on write areas (and therefore caches) are
created for all the areas in the parent team, but they were always
created as swappable. If the parent team had some B_FULL_LOCK areas,
which aren't swappable, the wrong type of cache would be created which
lead to them not being mergeable later on (causing a panic).
Comments about a possibly cleaner way to figure out the cache type
would be welcome.
