* updated if_re to HEAD from FreeBSD, keeping most Haiku changes (re_defrag was removed for the time being).
I'd like to know if keeping re_defrag is required. Tests welcome (see #5180). git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37041 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Jérôme Duval
parent
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@ -29,7 +29,7 @@
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD: src/sys/pci/if_rlreg.h,v 1.67.2.14 2008/08/09 02:07:30 yongari Exp $
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* $FreeBSD: src/sys/pci/if_rlreg.h,v 1.101 2010/04/09 23:00:24 yongari Exp $
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*/
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/*
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@ -131,6 +131,9 @@
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#define RL_TBI_ANAR 0x0068
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#define RL_TBI_LPAR 0x006A
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#define RL_GMEDIASTAT 0x006C /* 8 bits */
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#define RL_MACDBG 0x006D /* 8 bits, 8168C SPIN2 only */
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#define RL_GPIO 0x006E /* 8 bits, 8168C SPIN2 only */
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#define RL_PMCH 0x006F /* 8 bits */
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#define RL_MAXRXPKTLEN 0x00DA /* 16 bits, chip multiplies by 8 */
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#define RL_GTXSTART 0x0038 /* 8 bits */
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@ -152,15 +155,20 @@
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/* Known revision codes. */
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#define RL_HWREV_8169 0x00000000
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#define RL_HWREV_8110S 0x00800000
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#define RL_HWREV_8169S 0x04000000
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#define RL_HWREV_8169S 0x00800000
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#define RL_HWREV_8110S 0x04000000
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#define RL_HWREV_8169_8110SB 0x10000000
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#define RL_HWREV_8169_8110SC 0x18000000
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#define RL_HWREV_8102EL 0x24800000
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#define RL_HWREV_8102EL_SPIN1 0x24C00000
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#define RL_HWREV_8168D 0x28000000
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#define RL_HWREV_8168DP 0x28800000
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#define RL_HWREV_8168E 0x2C000000
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#define RL_HWREV_8168_SPIN1 0x30000000
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#define RL_HWREV_8100E 0x30800000
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#define RL_HWREV_8101E 0x34000000
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#define RL_HWREV_8102E 0x34800000
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#define RL_HWREV_8103E 0x34C00000
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#define RL_HWREV_8168_SPIN2 0x38000000
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#define RL_HWREV_8168_SPIN3 0x38400000
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#define RL_HWREV_8168C 0x3C000000
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@ -174,9 +182,10 @@
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#define RL_HWREV_8139C 0x74000000
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#define RL_HWREV_8139D 0x74400000
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#define RL_HWREV_8139CPLUS 0x74800000
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#define RL_HWREV_8101 0x74c00000
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#define RL_HWREV_8101 0x74C00000
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#define RL_HWREV_8100 0x78800000
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#define RL_HWREV_8169_8110SBL 0x7CC00000
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#define RL_HWREV_8169_8110SCE 0x98000000
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#define RL_TXDMA_16BYTES 0x00000000
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#define RL_TXDMA_32BYTES 0x00000100
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@ -307,7 +316,29 @@
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#define RL_CMD_TX_ENB 0x0004
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#define RL_CMD_RX_ENB 0x0008
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#define RL_CMD_RESET 0x0010
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#define RL_CMD_STOPREQ 0x0080
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/*
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* Twister register values. These are completely undocumented and derived
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* from public sources.
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*/
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#define RL_CSCFG_LINK_OK 0x0400
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#define RL_CSCFG_CHANGE 0x0800
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#define RL_CSCFG_STATUS 0xf000
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#define RL_CSCFG_ROW3 0x7000
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#define RL_CSCFG_ROW2 0x3000
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#define RL_CSCFG_ROW1 0x1000
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#define RL_CSCFG_LINK_DOWN_OFF_CMD 0x03c0
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#define RL_CSCFG_LINK_DOWN_CMD 0xf3c0
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#define RL_NWAYTST_RESET 0
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#define RL_NWAYTST_CBL_TEST 0x20
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#define RL_PARA78 0x78
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#define RL_PARA78_DEF 0x78fa8388
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#define RL_PARA7C 0x7C
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#define RL_PARA7C_DEF 0xcb38de43
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#define RL_PARA7C_RETUNE 0xfb38de03
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/*
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* EEPROM control register
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*/
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@ -501,6 +532,11 @@
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#define RL_RXBUFLEN (1 << ((RL_RX_BUF_SZ >> 11) + 13))
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#define RL_TX_LIST_CNT 4
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#define RL_MIN_FRAMELEN 60
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#define RL_TX_8139_BUF_ALIGN 4
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#define RL_RX_8139_BUF_ALIGN 8
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#define RL_RX_8139_BUF_RESERVE sizeof(int64_t)
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#define RL_RX_8139_BUF_GUARD_SZ \
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(ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN + RL_RX_8139_BUF_RESERVE)
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#define RL_TXTHRESH(x) ((x) << 11)
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#define RL_TX_THRESH_INIT 96
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#define RL_RX_FIFOTHRESH RL_RXFIFO_NOTHRESH
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@ -522,10 +558,13 @@ struct rl_chain_data {
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uint16_t cur_rx;
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uint8_t *rl_rx_buf;
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uint8_t *rl_rx_buf_ptr;
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bus_dmamap_t rl_rx_dmamap;
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struct mbuf *rl_tx_chain[RL_TX_LIST_CNT];
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bus_dmamap_t rl_tx_dmamap[RL_TX_LIST_CNT];
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bus_dma_tag_t rl_tx_tag;
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bus_dma_tag_t rl_rx_tag;
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bus_dmamap_t rl_rx_dmamap;
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bus_addr_t rl_rx_buf_paddr;
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uint8_t last_tx;
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uint8_t cur_tx;
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};
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@ -745,7 +784,7 @@ struct rl_stats {
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#define RE_RX_DESC_BUFLEN MCLBYTES
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#endif
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#define RL_MSI_MESSAGES 2
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#define RL_MSI_MESSAGES 1
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#define RL_ADDR_LO(y) ((uint64_t) (y) & 0xFFFFFFFF)
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#define RL_ADDR_HI(y) ((uint64_t) (y) >> 32)
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@ -801,6 +840,8 @@ struct rl_list_data {
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bus_addr_t rl_tx_list_addr;
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};
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enum rl_twist { DONE, CHK_LINK, FIND_ROW, SET_PARAM, RECHK_LONG, RETUNE };
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struct rl_softc {
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struct ifnet *rl_ifp; /* interface info */
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bus_space_handle_t rl_bhandle; /* bus space handle */
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@ -813,7 +854,6 @@ struct rl_softc {
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void *rl_intrhand[RL_MSI_MESSAGES];
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device_t rl_miibus;
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bus_dma_tag_t rl_parent_tag;
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bus_dma_tag_t rl_tag;
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uint8_t rl_type;
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int rl_eecmd_read;
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int rl_eewidth;
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@ -830,6 +870,10 @@ struct rl_softc {
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uint32_t rl_rxlenmask;
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int rl_testmode;
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int rl_if_flags;
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int rl_twister_enable;
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enum rl_twist rl_twister;
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int rl_twist_row;
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int rl_twist_col;
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int suspended; /* 0 = normal 1 = suspended */
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#ifdef DEVICE_POLLING
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int rxcycles;
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@ -841,12 +885,19 @@ struct rl_softc {
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int rl_txstart;
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uint32_t rl_flags;
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#define RL_FLAG_MSI 0x0001
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#define RL_FLAG_INVMAR 0x0004
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#define RL_FLAG_AUTOPAD 0x0002
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#define RL_FLAG_PHYWAKE_PM 0x0004
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#define RL_FLAG_PHYWAKE 0x0008
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#define RL_FLAG_NOJUMBO 0x0010
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#define RL_FLAG_PAR 0x0020
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#define RL_FLAG_DESCV2 0x0040
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#define RL_FLAG_MACSTAT 0x0080
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#define RL_FLAG_FASTETHER 0x0100
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#define RL_FLAG_CMDSTOP 0x0200
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#define RL_FLAG_MACRESET 0x0400
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#define RL_FLAG_WOLRXENB 0x1000
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#define RL_FLAG_MACSLEEP 0x2000
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#define RL_FLAG_PCIE 0x4000
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#define RL_FLAG_LINK 0x8000
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};
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@ -892,6 +943,7 @@ struct rl_softc {
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CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) & ~(val))
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#define RL_TIMEOUT 1000
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#define RL_PHY_TIMEOUT 2000
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/*
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* General constants that are fun to know.
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@ -1097,4 +1149,3 @@ struct rl_softc {
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#define RL_PSTATE_D3 0x0003
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#define RL_PME_EN 0x0010
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#define RL_PME_STATUS 0x8000
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