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Intel_extreme: fixed Pipe config pgm fault, fixed PLL setup fault (non-analog ports).

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This commit is contained in:
Rudolf Cornelissen 2021-06-01 20:26:32 +00:00
parent 0a6ab6bbca
commit fe40adc2a6
1 changed files with 5 additions and 5 deletions
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10
src/add-ons/accelerants/intel_extreme/Ports.cpp
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@ -133,7 +133,7 @@ Port::SetPipe(Pipe* pipe)
// FIXME is the use of PORT_TRANS_* constants correct for Sandy Bridge /
// Cougar Point? Or is it only for Ivy Bridge / Panther point onwards?
if (gInfo->shared_info->pch_info == INTEL_PCH_CPT) {
portState &= PORT_TRANS_SEL_MASK;
portState &= ~PORT_TRANS_SEL_MASK;
if (pipe->Index() == INTEL_PIPE_A)
write32(portRegister, portState | PORT_TRANS_A_SEL_CPT);
else
@ -562,7 +562,7 @@ LVDSPort::SetDisplayMode(display_mode* target, uint32 colorMode)
// LVDS on PCH needs set before display enable
if (gInfo->shared_info->pch_info == INTEL_PCH_CPT) {
lvds &= PORT_TRANS_SEL_MASK;
lvds &= ~PORT_TRANS_SEL_MASK;
if (fPipe->Index() == INTEL_PIPE_A)
lvds |= PORT_TRANS_A_SEL_CPT;
else
@ -597,7 +597,7 @@ LVDSPort::SetDisplayMode(display_mode* target, uint32 colorMode)
// DPLL mode LVDS for i915+
if (gInfo->shared_info->device_type.Generation() >= 3)
extraPLLFlags |= DISPLAY_PLL_MODE_LVDS;
extraPLLFlags |= DISPLAY_PLL_MODE_LVDS | DISPLAY_PLL_2X_CLOCK;
// Program general pipe config
fPipe->Configure(target);
@ -749,7 +749,7 @@ DigitalPort::SetDisplayMode(display_mode* target, uint32 colorMode)
uint32 extraPLLFlags = 0;
if (gInfo->shared_info->device_type.Generation() >= 3)
extraPLLFlags |= DISPLAY_PLL_MODE_NORMAL;
extraPLLFlags |= DISPLAY_PLL_MODE_NORMAL | DISPLAY_PLL_2X_CLOCK;
// Program general pipe config
fPipe->Configure(target);
@ -1117,7 +1117,7 @@ DigitalDisplayInterface::SetDisplayMode(display_mode* target, uint32 colorMode)
uint32 extraPLLFlags = 0;
if (gInfo->shared_info->device_type.Generation() >= 3)
extraPLLFlags |= DISPLAY_PLL_MODE_NORMAL;
extraPLLFlags |= DISPLAY_PLL_MODE_NORMAL | DISPLAY_PLL_2X_CLOCK;
// Program general pipe config
fPipe->Configure(target);